Method for structural layer fabrication in micromechanical devices
A method for manufacturing a structural layer in a silicon wafer is provide. The silicon wafer has at least two areas vertically recessed to at least two recess depths, with the first recess depth being greater than the second recess depth. The method includes forming a silicon dioxide pattern, a mask layer and a silicon dioxide pad layer, etching the structural layer in a main LOCOS oxidation process, and removing the formed layers exposing the recessed structural layer. The manufactured structural layer has a bump structure with the recess depth smaller than the second recess depth, and the recessed area has no edge steps.
1 . A method for manufacturing a structural layer in a silicon wafer, the method comprising:
forming a silicon dioxide pad layer in first, second and third areas of the structural layer in the silicon wafer;
depositing a non-oxidizable mask layer in the first, the second and the third areas of the structural layer;
removing the silicon dioxide pad layer and the non-oxidizable mask layer from the first area and the second area of the structural layer;
consuming the structural layer in an initial LOCOS oxidation process step to form an initial LOCOS oxide layer in the first area and the second area of the structural layer;
removing the initial LOCOS oxide layer from the first area of the structural layer to form a silicon dioxide pattern from the initial LOCOS oxide layer in the second area of the structural layer, such that the structural layer includes a bump structure in the second area having a smaller recess depth than a recess depth in the first area of the structural layer; and
consuming the structural layer in at least one main LOCOS oxidation process step to form a main LOCOS oxide layer in the first area and the second area of the structural layer.
2 . The method for manufacturing according to claim 1 , further comprising removing the silicon dioxide pad layer, the mask layer and the LOCOS oxide layer from the structural layer to expose the first area and the second area of the structural layer.
3 . The method for manufacturing according to claim 2 , wherein the first area, the second area and the third area of the structural layer are on a horizontal face of the silicon wafer.
4 . The method for manufacturing according to claim 3 , wherein the third area of the structural layer is level with the horizontal face of the wafer, and the first and the second area are recessed in a vertical direction from the horizontal face of the wafer.
5 . The method for manufacturing according to claim 4 , wherein the vertical direction is perpendicular to the horizontal face of the wafer.
6 . The method for manufacturing according to claim 5 , further comprising:
etching the first area to a first recess depth in relation to the horizontal face of the wafer; and
etching the second area to a second recess depth in relation to the horizontal face of the wafer, with the first recess depth being greater than the second recess depth.
7 . The method for manufacturing according to claim 1 , wherein the removing of the silicon dioxide pad layer comprises wet etching the silicon dioxide pad layer so that only the third area is protected from recession by the non-oxidizable mask layer deposited over the silicon dioxide pad layer.