IP Library Granted Patent US 12680189
Granted Patent B2
US 12680189 · App. 18/691,466 · Granted Jul 14, 2026

Process for manufacturing a monocrystalline silicon semiconductor wafer, and monocrystalline silicon semiconductor wafer

Inventors: Timo Mueller (Burghausen, DE); Michael Boy (Waging am See, DE); Michael Gehmlich (Weissenborn, DE); Gudrun Kissinger (Frankfurt, DE); Dawid Kot (Slubice, PL)
Assignee: SILTRONIC AG
C30B15/203C30B29/06C30B33/02H10P36/20
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Quick Facts
Patent No.
US 12680189
App. No.
18/691,466
Filed
Mar 13, 2024
Granted
Jul 14, 2026
Kind
B2
Art Unit
1714
USPC
117/13
Abstract

A semiconductor wafer of monocrystalline silicon is produced, in the following order: growing a single crystal of silicon by the CZ method; dividing off a wafer consisting completely of an N region, in which there are no agglomerates of silicon interstitials or vacancies having a diameter of more than 20 nm, and has an oxygen concentration of not less than 5.3×10 17 atoms/cm 3 and not more than 5.9×10 17 atoms/cm 3 and a nitrogen concentration of not more than 1.0×10 12 atoms/cm 3 ; executing a three separate rapid thermal annealing (RTA) treatments of the wafer at temperatures within different temperature ranges over different time periods in a different atmospheres of argon with and without ammonia.

Claims (14)

1 . A method for producing a semiconductor wafer of monocrystalline silicon, the method comprising in the following order:

growing a single crystal of silicon by the Czochralski (CZ) method;

dividing at least one semiconductor wafer of monocrystalline silicon from the single crystal, wherein the semiconductor wafer consists completely of an N region, in which there are no agglomerates of silicon interstitials or vacancies having a diameter of more than 20 nm, and has an oxygen concentration of not less than 5.3×10 17 atoms/cm 3 and not more than 5.9×10 17 atoms/cm 3 and a nitrogen concentration of not more than 1.0×10 12 atoms/cm 3 ;

executing a first rapid thermal annealing (RTA) treatment of the semiconductor wafer at a first temperature in a first temperature range of not less than 750° C. and not more than 1100° C. over a first period of not less than 10 s and not more than 30 s in a first atmosphere of argon and ammonia in a ratio of not less than 1:2 and not more than 1:0.75;

executing a second RTA treatment of the semiconductor wafer at a second temperature in a second temperature range of not less than 1190° C. and not more than 1280° C. over a second period of not less than 20 s and not more than 35 s in a second atmosphere of argon; and

executing a third RTA treatment of the semiconductor wafer at a third temperature in a third temperature range of not less than 1160° C. and not more than 1180° C. over a third period of not less than 15 s and not more than 25 s in a third atmosphere of argon and ammonia in a ratio of not less than 8:10 and not more than 3:2.

2 . The method as claimed in claim 1 , which further comprises a fourth RTA treatment of the semiconductor wafer at a fourth temperature in a fourth temperature range of not less than 1130° C. and not more than 1145° C. over a fourth period of not less than 25 s and not more than 35 s in a fourth atmosphere of argon.

3 . A semiconductor wafer of monocrystalline silicon having a front side and a back side, consisting of an N region, comprising

an interstitial oxygen concentration of not less than 5.3×10 17 atoms/cm 3 and not more than 5.9×10 17 atoms/cm 3 ; and

a nitrogen concentration, which decreases from the front side and from the back side into the interior of the semiconductor wafer and in a depth of 50 μm from the front side is not less than 2.0×10 15 atoms/cm 3 .

4 . The semiconductor wafer as claimed in claim 3 , wherein the nitrogen concentration in a near-surface region of the back side is lower than in a near-surface region of the front side.

5 . The semiconductor wafer as claimed in claim 3 , which comprises:

a denuded zone, which extends from the front side to a depth of not less than 10 μm and not more than 20 μm into the interior of the semiconductor wafer, and

an underlying region with BMDs of a density of 5.0×10 9 cm −3 to 7.0×10 9 cm −3 .