System and method for schedule-based I/O multiplexing for integrated circuit (IC) scan test
An approach is proposed to support schedule-based I/O multiplexing for scan testing of an IC. A plurality of I/Os are assigned to a plurality of blocks in the IC for scan testing based on a set of slots under a set of schedules. Each of the set of slots includes a fixed number of scan input pins/pads and scan output pins/pads of the IC. Each slot is then assigned to a specific block on the IC for the scan test until all of the slots available are utilized. The group of assigned blocks is referred to as a schedule, and all of these blocks belonging to this schedule are scan tested in parallel at the same time. The remaining blocks on the IC are also assigned to the slots until all blocks on the IC are assigned to a schedule to be scan tested.
1 . An apparatus to support scan testing, comprising:
a test controller configured to broadcast a schedule programming signal to a plurality of blocks on an integrated circuit (IC), wherein the plurality of blocks includes a first subset of blocks and a second subset of blocks, wherein the schedule programming signal identifies the first subset of blocks of the plurality of blocks to be tested in an active schedule; and
a plurality of scan hub components associated with the plurality of blocks, wherein each scan hub component of the plurality of scan hub components is embedded within its respective block of the plurality of blocks on the IC, wherein the each scan hub component embedded within its respective block of the plurality of scan hub components is configured to
accept and maintain a scan hub ID, wherein the scan hub ID represents a schedule for a scan test that the respective block of the plurality of blocks is assigned to;
receive the schedule programming signal and compare the schedule programming signal to the scan hub ID maintained and associated with the respective block of the plurality of blocks to determine whether the respective block of the plurality of blocks is within the first subset of blocks;
allow scan inputs from a set of scan input pins of the IC to pass through to the respective block of the plurality of blocks to be scan tested and scan outputs from the respective block of the plurality of blocks to be sent to a set of scan output pins of the IC if the broadcasted schedule programming signal matches the scan hub ID of the block that determines the respective block of the plurality blocks is within the first subset of the blocks.
2 . The IC of claim 1 , wherein:
the each of the plurality of scan hub components is configured to gate off the scan inputs to the set of scan input pins of the IC and set the scan outputs from the block to binary Os at the set of scan output pins of the IC if the broadcasted schedule programming signal does not match the scan hub ID of the block.
3 . The IC of claim 1 , wherein:
the test controller is configured to broadcast the schedule programming signal to the blocks that belong to a same slot across different schedules for the same set of scan input pins.
4 . The IC of claim 1 , wherein:
the test controller is configured to combine the scan output from the blocks belonging to a same set of output pins across different schedules together before sending a single set of scan output to the set of output pins.
5 . A method, comprising:
accepting and maintaining a scan hub ID in each scan hub component of one or more of scan hub components, wherein each scan hub component is embedded within its respective block of a plurality of blocks on an integrated circuit (IC), wherein the scan hub ID identifies a schedule for a scan test that the respective block of the plurality of blocks is assigned to;
each scan hub component of the one or more scan hub components comparing a received schedule programming signal to the scan hub ID maintained and associated with the respective block, wherein the schedule programming signal identifies a subset of blocks of the plurality of blocks to be tested in an active schedule, wherein the comparing determines whether the respective block of the plurality of blocks is within the subset of blocks to be tested in the active schedule; and
allowing scan inputs from a set of scan input pins of the IC to pass through to the respective block to be scan tested and scan outputs from the respective block to be sent to a set of scan output pins of the IC if the comparing determines that the schedule programming signal matches the scan hub ID of the respective block.
6 . The method of claim 5 , further comprising:
gating off the scan inputs to the set of scan input pins of the IC and setting the scan outputs from the block to binary Os at the set of scan output pins of the IC by the each of the plurality of scan hub components if the schedule programming signal does not match the scan hub ID of the block.
7 . The method of claim 5 , further comprising:
broadcasting the schedule programming signal to the blocks that belong to a same slot across different schedules for the same set of scan input pins.
8 . The method of claim 5 , further comprising:
combining the scan output from the blocks belonging to a same set of output pins across different schedules together before sending a single set of scan output to the set of output pins.
9 . The method of claim 5 further comprising receiving a broadcast of a schedule programming signal, wherein the schedule programming signal identifies a set of blocks to be tested in an active schedule.
10 . An apparatus to support scan testing, comprising:
a means for broadcasting a schedule programming signal to a plurality of blocks on an integrated circuit (IC), wherein the plurality of blocks includes a first subset of blocks and a second subset of blocks, wherein the schedule programming signal represents the first subset of blocks of the plurality of blocks to be tested in an active schedule;
a means for accepting and maintaining a scan hub ID in each scan hub component of a plurality of scan hub components, wherein each scan hub component is embedded within its respective block of the plurality of blocks on the IC, wherein the scan hub ID represents a schedule for a scan test that the respective block of the plurality of blocks is assigned to;
a means for comparing the broadcasted schedule programming signal to the scan hub ID maintained and associated with the respective block for each scan hub component of the plurality of scan hub components to determine whether the respective block of the plurality of blocks is within the first subset of blocks to be tested in the active schedule;
a means for allowing scan inputs from a set of scan input pins of the IC to pass through to the respective block to be scan tested and scan outputs from the respective block to be sent to a set of scan output pins of the IC if the broadcasted schedule programming signal matches the scan hub ID of the respective block.
11 . The apparatus of claim 10 further comprising:
gating off the scan inputs to the set of scan input pins of the IC and set the scan outputs from the block to binary Os at the set of scan output pins of the IC if the broadcasted schedule programming signal does not match the scan hub ID of the block.
12 . The apparatus of claim 10 , wherein the schedule programming signal is broadcasted to the blocks that belong to a same slot across different schedules for the same set of scan input pins.
13 . The apparatus of claim 10 further comprising a means for combining the scan output from the blocks belonging to a same set of output pins across different schedules together before sending a single set of scan output to the set of output pins.
14 . An apparatus to support scan testing:
a means for accepting and maintaining a scan hub ID in each scan hub component of one or more of scan hub components, wherein each scan hub component is embedded within its respective block of a plurality of blocks on an integrated circuit (IC), wherein the scan hub ID identifies a schedule for a scan test that the respective block of the plurality of blocks is assigned to;
a means for comparing a received schedule programming signal to the scan hub ID maintained and associated with the respective block for each scan hub component of the one or more scan hub components, wherein the schedule programming signal identifies a subset of blocks of the plurality of blocks to be tested in an active schedule, and wherein the means for comparing determines whether the respective block of the plurality of blocks is within the subset of blocks to be tested in the active schedule; and
a means for allowing scan inputs from a set of scan input pins of the IC to pass through to the respective block to be scan tested and scan outputs from the respective block to be sent to a set of scan output pins of the IC if the schedule programming signal matches the scan hub ID of the respective block.
15 . The apparatus of claim 14 further comprising a means for gating off the scan inputs to the set of scan input pins of the IC and setting the scan outputs from the block to binary Os at the set of scan output pins of the IC by the each of the plurality of scan hub components if the schedule programming signal does not match the scan hub ID of the block.
16 . The apparatus of claim 14 further comprising a means for broadcasting the schedule programming signal to the blocks that belong to a same slot across different schedules for the same set of scan input pins.
17 . The apparatus of claim 14 further comprising a means for combining the scan output from the blocks belonging to a same set of output pins across different schedules together before sending a single set of scan output to the set of output pins.
18 . The apparatus of claim 14 further comprising a means for receiving a broadcast of a schedule programming signal, wherein the schedule programming signal identifies a set of blocks to be tested in an active schedule.
19 . An apparatus to support scan testing, comprising:
one or more scan hub components, wherein each scan hub component is embedded within its respective block of a plurality of blocks on an integrated circuit (IC), wherein the each scan hub component is configured to
accept and maintain a scan hub ID, wherein the scan hub ID represents a schedule for a scan test that the respective block of the plurality of blocks on the IC is assigned to;
compare a received schedule programming signal to the scan hub ID maintained and associated with the respective block, wherein the schedule programming signal identifies a subset of blocks of the plurality of blocks to be tested in an active schedule, and wherein comparing the received scheduled programming signal to the scan hub ID associated with the respective block determines whether the respective block of the plurality of blocks is within the subset of blocks of the plurality of blocks to be tested in the active schedule;
allow scan inputs from a set of scan input pins of the IC to pass through to the respective block to be scan tested and scan outputs from the respective block to be sent to a set of scan output pins of the IC if the schedule programming signal matches the scan hub ID of the respective block.
20 . A method, comprising:
broadcasting a schedule programming signal to a plurality of blocks on an integrated circuit (IC), wherein the plurality of blocks includes a first subset of blocks and a second subset of blocks, wherein the schedule programming signal identifies the first subset of blocks of the plurality of blocks to be tested in an active schedule;
accepting and maintaining a scan hub ID in each of a plurality of scan hub components associated with the plurality of blocks, wherein each scan hub component of the plurality of scan hub components is embedded within its respective block of the plurality of blocks on the IC, wherein the scan hub ID identifies a schedule for a scan test that the respective block of the plurality of blocks is assigned to;
comparing the broadcasted schedule programming signal to the scan hub ID maintained and associated with the respective block to determine whether the respective block of the plurality of blocks is within the first subset of blocks; and
allowing scan inputs from a set of scan input pins of the IC to pass through to the respective block to be scan tested and scan outputs from the respective block to be sent to a set of scan output pins of the IC if the broadcasted schedule programming signal matches the scan hub ID of the respective block.