Direct silicon-to-silicon bonding for fiber-first packaging process

1 . An electro-optical chip assembly, comprising:

a silicon baseplate;

an electro-optical chip having a silicon substrate, the silicon substrate of the electro-optical chip fusion bonded to the silicon baseplate, wherein the electro-optical chip is manufactured separate from the silicon baseplate before fusion bonding of the silicon substrate of the electro-optical chip to the silicon baseplate, wherein a ball grid array is disposed on a surface of the electro-optical chip that faces away from the silicon baseplate, wherein the electro-optical chip is in a pre-solder-reflow state such that solder balls of the ball grid array have not yet been reflowed; and

a plurality of optical fibers attached to the electro-optical chip.

2 . The electro-optical chip assembly as recited in claim 1 , further comprising:

a cover plate disposed to secure the plurality of optical fibers to the electro-optical chip.

3 . The electro-optical chip assembly as recited in claim 1 , wherein the plurality of optical fibers is secured to the silicon baseplate.

4 . The electro-optical chip assembly as recited in claim 3 , further comprising:

an adhesive disposed to secure the plurality of optical fibers to the silicon baseplate.

5 . The electro-optical chip assembly as recited in claim 1 , further comprising:

a test system including a plurality of electrically conductive contact pads positioned in physical contact with solder balls of the ball grid array, the test system including optical input/output devices optically connected to the plurality of optical fibers.

6 . The electro-optical chip assembly as recited in claim 5 , wherein the test system is configured to use the plurality of optical fibers and the ball grid array for testing of photonic and electronic performance of the electro-optical chip.

7 . An electro-optical chip wafer assembly, comprising:

a silicon base wafer; and

a plurality of electro-optical chips distributed across the silicon base wafer, each of the plurality of electro-optical chips having a silicon substrate fusion bonded to the silicon base wafer, wherein each of the plurality of electro-optical chips is manufactured on a semiconductor wafer that is separate from the silicon base wafer.

8 . The electro-optical chip wafer assembly as recited in claim 7 , further comprising:

a plurality of scribe lines defined across the silicon base wafer such that a plurality of silicon baseplates for the respective plurality of electro-optical chips is delineated by the plurality of scribe lines, wherein each of the plurality of silicon baseplates corresponds to a different portion of the silicon base wafer.

9 . The electro-optical chip wafer assembly as recited in claim 8 , wherein each of the plurality of silicon baseplates has a substantially same shape and a substantially same size.

10 . The electro-optical chip wafer assembly as recited in claim 9 , wherein the substantially same shape is a substantially rectangular shape.

11 . The electro-optical chip wafer assembly as recited in claim 10 , wherein each of the plurality of electro-optical chips has a side along which an optical fiber attachment region is formed, wherein each of the plurality of electro-optical chips is positioned on its respective silicon baseplate such that its respective silicon baseplate extends away from the side of the electro-optical chip along which the optical fiber attachment region is formed by a distance that provides for attachment of a plurality of optical fibers to its respective silicon baseplate.

12 . The electro-optical chip wafer assembly as recited in claim 7 , wherein each of the plurality of electro-optical chips has a respective plurality of solder bumps exposed on a surface of the electro-optical chip that faces away from the silicon base wafer.

13 . A method for manufacturing an electro-optical chip assembly, comprising:

attaching an electro-optical chip to a carrier wafer such that a silicon substrate of the electro-optical chip faces away from the carrier wafer;

positioning the carrier wafer over a silicon base wafer such that the silicon substrate of the electro-optical chip faces toward the silicon base wafer;

applying a force to the carrier wafer to press the silicon substrate of the electro-optical chip against the silicon base wafer;

fusion bonding the silicon substrate of the electro-optical chip with the silicon base wafer; and

releasing the carrier wafer from the electro-optical chip.

14 . The method as recited in claim 13 , further comprising:

disposing an adhesive layer on the carrier wafer, the adhesive layer configured to attach the electro-optical chip to the carrier wafer.

15 . The method as recited in claim 13 , wherein the carrier wafer includes a socket configured to receive the electro-optical chip, wherein attaching the electro-optical chip to the carrier wafer includes disposing the electro-optical chip within the socket.

16 . The method as recited in claim 13 , further comprising:

disposing a mold compound around the electro-optical chip after the electro-optical chip is attached to the carrier wafer and before the carrier wafer is positioned over the silicon base wafer; and

removing the mold compound from around the electro-optical chip as part of releasing the carrier wafer from the electro-optical chip.

17 . The method as recited in claim 13 , wherein the electro-optical chip is attached to the carrier wafer such that a plurality of solder bumps of the electro-optical chip faces toward the carrier wafer.

18 . The method as recited in claim 13 , further comprising:

disposing a plurality of solder bumps on the electro-optical chip after the carrier wafer is released from the electro-optical chip.

19 . The method as recited in claim 13 , further comprising:

singulating the silicon base wafer after fusion bonding of the silicon substrate of the electro-optical chip with the silicon base wafer and after releasing the carrier wafer from the electro-optical chip, wherein the silicon base wafer is singulated such that a portion of the silicon base wafer bonded to the electro-optical chip forms a silicon baseplate for the electro-optical chip, and such that the silicon baseplate includes a region for attachment of a plurality of optical fibers to the silicon baseplate.

20 . The method as recited in claim 19 , further comprising:

attaching a plurality of optical fibers to the electro-optical chip to provide for optical communication between the plurality of optical fibers and the electro-optical chip; and

securing the plurality of optical fibers to the silicon baseplate to which the substrate of the electro-optical chip is fusion bonded before performing a solder reflow process to attach the electro-optical chip to an electronic package.

21 . The method as recited in claim 20 , further comprising:

performing photonic and electrical testing of the electro-optical chip after attaching the plurality of optical fibers to the electro-optical chip and before performing the solder reflow process to attach the electro-optical chip to the electronic package.

22 . The method as recited in claim 21 , further comprising:

performing the solder reflow process to attach the electro-optical chip to the electronic package.