Low dropout voltage regulator including power supply noise suppression circuit
An apparatus, including: an upper voltage rail; a lower voltage rail; a low dropout (LDO) voltage regulator configured to generate a regulated output voltage at an output coupled between the upper voltage rail and the lower voltage rail while transferring noise from the upper voltage rail to the output; and an auxiliary noise suppression circuit configured to transfer noise from the upper voltage rail to the output of the LDO voltage regulator with a phase substantially opposite to a phase of the noise transferred to the output by the LDO voltage regulator such that noise suppression or reduction occurs at the output of the LDO voltage regulator.
1 . An apparatus, comprising:
an upper voltage rail;
a lower voltage rail;
a low dropout (LDO) voltage regulator configured to generate a regulated output voltage at an output coupled between the upper voltage rail and the lower voltage rail while transferring noise from the upper voltage rail to the output, wherein the LDO voltage regulator comprises a first field effect transistor (FET) coupled between the upper voltage rail and the output of the LDO voltage regulator, and wherein the LDO voltage regulator transfers the noise from the upper voltage rail to the output in accordance with a first noise transfer function that is a function of an output resistance of the first FET; and
an auxiliary noise suppression circuit configured to transfer noise from the upper voltage rail to the output of the LDO voltage regulator with a phase substantially opposite to a phase of the noise transferred to the output by the LDO voltage regulator such that noise suppression or reduction occurs at the output of the LDO voltage regulator, wherein the auxiliary noise suppression circuit comprises
an operational transconductance amplifier (OTA) including an output coupled to the output of the LDO voltage regulator; and
an alternating current (AC) coupling capacitor coupled between the upper voltage rail and an input to the OTA, wherein the OTA is configured to transfer the noise from the input to the output of the OTA in accordance with a second transfer function that is a function of a transconductance gain of the OTA.
2 . The apparatus of claim 1 , wherein the first FET comprises a p-channel FET.
3 . The apparatus of claim 1 , wherein the first FET comprises an n-channel FET.
4 . The apparatus of claim 1 , wherein the LDO voltage regulator comprises:
a differential amplifier including a first input configured to receive a reference voltage,
wherein an output of the differential amplifier is coupled to a gate of the first FET.
5 . The apparatus of claim 4 , wherein the first FET comprises an n-channel FET (NFET).
6 . The apparatus of claim 5 , wherein the LDO voltage regulator comprises a voltage boost circuit coupled between the output of the differential amplifier and a gate of the NFET.
7 . The apparatus of claim 4 , wherein the first FET comprises a p-channel FET (PFET), wherein the LDO voltage regulator further comprises a capacitor coupled between the upper voltage rail and a gate of the PFET.
8 . An apparatus, comprises:
an upper voltage rail;
a lower voltage rail;
a low dropout (LDO) voltage regulator configured to generate a regulated output voltage at an output coupled between the upper voltage rail and the lower voltage rail while transferring noise from the upper voltage rail to the output, wherein the LDO voltage regulator comprises
a differential amplifier including a first input configured to receive a reference voltage, and
a first field effect transistor (FET) coupled between the upper voltage rail and the output of the LDO voltage regulator, wherein an output of the differential amplifier is coupled to a gate of the first FET; and
an auxiliary noise suppression circuit configured to transfer noise from the upper voltage rail to the output of the LDO voltage regulator with a phase substantially opposite to a phase of the noise transferred to the output by the LDO voltage regulator such that noise suppression or reduction occurs at the output of the LDO voltage regulator,
wherein the auxiliary noise suppression circuit comprises:
an operational transconductance amplifier (OTA) including an output coupled to the output of the LDO voltage regulator; and
an alternating current (AC) coupling capacitor coupled between the upper voltage rail and an input to the OTA.
9 . The apparatus of claim 8 , wherein the first FET comprises an n-channel FET (NFET).
10 . The apparatus of claim 9 , wherein the LDO voltage regulator further comprises a voltage boost circuit coupled between the output of the differential amplifier and a gate of the NFET.
11 . The apparatus of claim 8 , wherein the first FET comprises a p-channel FET (PFET), wherein the LDO voltage regulator further comprises a capacitor coupled between the upper voltage rail and a gate of the PFET.