Display panel, driving chip, and display device

1 . A display panel, comprising:

a plurality of pixel columns connected to a plurality of data lines, wherein the plurality of data lines includes first data lines;

a plurality of touch channels connected to a plurality of touch leads;

a plurality of bonding terminals including first bonding terminals, wherein the first bonding terminals are used for transmission of data signals and touch signals in a time-sharing manner; and

first gating circuits, wherein one first gating circuit is connected between one corresponding first bonding terminal, one corresponding first data line, and one corresponding touch lead, and is used to connect the corresponding first data line and the corresponding touch lead to the corresponding first bonding terminal in a time-sharing manner,

wherein:

the plurality of bonding terminals include second bonding terminals;

the plurality of data lines includes second data lines; and

the second bonding terminals are directly connected to the second data lines without passing through a first gating circuit, and the second bonding terminals are not connected to the plurality of touch leads.

2 . The display panel according to claim 1 , wherein:

the plurality of bonding terminals are arranged in at least one row along a first direction, and the first bonding terminals and the second bonding terminals are alternately distributed.

3 . The display panel according to claim 2 , wherein:

the first bonding terminals are distributed evenly in the first direction.

4 . The display panel according to claim 1 , wherein:

impedance of the first bonding terminals is smaller than impedance of the second bonding terminals.

5 . The display panel according to claim 4 , wherein:

an area of an orthographic projection of one first bonding terminal on a substrate of the display panel is larger than an area of an orthographic projection of one second bonding terminal on the substrate.

6 . The display panel according to claim 1 , wherein:

the one first gating circuit includes a first transistor and a second transistor, wherein the first transistor is connected between the corresponding first data line and the corresponding first bonding terminal, and the second transistor is connected between the corresponding touch lead and the corresponding first bonding terminal;

a pixel of the display panel includes a pixel circuit, wherein the pixel circuit includes a driving transistor and a switching transistor; and

a width-to-length ratio of a channel of the first transistor is larger than a width-to-length ratio of a channel of the switching transistor.

7 . The display panel according to claim 1 , wherein:

one first bonding terminal is connected to one corresponding first data line through a first connection line, and one second bonding terminal is connected to one corresponding second data line through a second connection line; and

impedance per unit length of the first connection line is smaller than impedance per unit length of the second connection line, and/or, a length of the first connection line is smaller than a length of the second connection line.

8 . The display panel according to claim 7 , wherein:

a wiring width of the first connection line is larger than a wiring width of the second connection line.

9 . The display panel according to claim 1 , further including second gating circuits, wherein:

one second gating circuit includes a first gating unit and a second gating unit;

the first gating unit is connected between multiple corresponding first data lines and one corresponding first gating circuit; and

the second gating unit is connected between multiple corresponding second data lines and one corresponding second bonding terminal.

10 . A driving chip, comprising:

a plurality of output pins including first output pins, wherein the first output pins are used to transmit data signals and touch signals in a time-sharing manner;

a plurality of display driving circuits including first display driving circuits;

a plurality of touch driving circuits; and

third gating circuits, wherein one third gating circuit is connected between one corresponding first output pin, one corresponding first display driving circuit, and one corresponding touch driving circuit, to connect the corresponding first display driving circuit and the corresponding touch driving circuit to the corresponding first output pin in a time-sharing manner.

11 . The driving chip according to claim 10 ,

wherein:

one first display driving circuit and one corresponding touch driving circuit are directly connected to one corresponding first output pin through different connection lines;

when the first display driving circuit transmits a data signal to the corresponding first output pin, the corresponding touch drive circuit is in a non-working state; and

when a touch signal is transmitted between the corresponding touch drive circuit and the corresponding first output pin, the first display drive circuit is in a non-working state.

12 . The driving chip according to claim 10 , wherein:

the plurality of display driving circuits include second display driving circuits, and the plurality of output pins include second output pins; and

one second output pin is connected to one corresponding second display driving circuit, and the second output pins are not connected to the plurality of touch drive circuits.

13 . The driving chip according to claim 12 , wherein:

the plurality of output pins are arranged in at least one row along a first direction, and the first output pins and the second output pins are alternately distributed.

14 . The driving chip according to claim 13 , wherein:

the first output pins are distributed evenly in the first direction.

15 . The driving chip according to claim 12 , wherein:

impedance of the first output pins is smaller than impedance of the second output pins.

16 . The driving chip according to claim 15 , wherein:

an area of an orthographic projection of one first output pin on a substrate of the display panel is larger than an area of an orthographic projection of one second output pin on the substrate.

17 . The driving chip according to claim 12 , wherein:

one first output pin is connected to one corresponding first display driving circuit through a third connection line, and one second output pin is connected to one corresponding second display driving circuit through a fourth connection line; and

impedance per unit length of the third connection line is smaller than impedance per unit length of the fourth connection line, and/or, a length of the third connection line is smaller than a length of the fourth connection line.

18 . A display device comprising a display panel and a driving chip, wherein:

the display panel includes:

a plurality of pixel columns connected to a plurality of data lines, wherein the plurality of data lines includes first data lines;

a plurality of touch channels connected to a plurality of touch leads;

a plurality of bonding terminals including first bonding terminals, wherein the first bonding terminals are used for transmission of data signals and touch signals in a time-sharing manner; and

first gating circuits, wherein one first gating circuit is connected between one corresponding first bonding terminal, one corresponding first data line, and one corresponding touch lead, and is used to connect the corresponding first data line and the corresponding touch lead to the corresponding first bonding terminal in a time-sharing manner,

wherein:

the plurality of bonding terminals include second bonding terminals;

the plurality of data lines includes second data lines; and

the second bonding terminals are directly connected to the second data lines without passing through a first gating circuit, and the second bonding terminals are not connected to the plurality of touch leads;

the driving chip includes a plurality of output pins, wherein the plurality of output pins includes first output pins used to transmit data signals and touch signals in a time-sharing manner; and

the first output pins of the driving chip are connected to the first bonding terminals of the display panel.