IP Library › Granted Patent US 12681655
Granted Patent B2
US 12681655 · App. 17/663,138 · Granted Jul 14, 2026

Block repurposing based on health metrics

Inventors: Chiara Cerafogli (Boise, ID); Carla L. Christensen (Boise, ID); Iolanda Del Villano (Villa di Briano, IT); Lalla Fatima Drissi (Ottaviano, IT); Anna Scalesse (Arzano, IT); Maddalena Calzolari (Milan, IT)
Assignee: Micron Technology, Inc.
G06F3/064G06F3/0604G06F3/0679
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Quick Facts
Patent No.
US 12681655
App. No.
17/663,138
Granted
Jul 14, 2026
Kind
B2
Abstract

Methods, systems, and devices for block repurposing based on health metrics are described. The method may involve setting a storage state of a block of memory cells, the storage state corresponding to a storage density of the block of memory cells or an access mode of the block of memory cells. Further, the method may involve updating the storage state of the block of memory cells based on a health condition associated with the block of memory cells and accessing the block of memory cells based on the updated storage state of the block of memory cells.

Claims (68)

1 . A host system, comprising:

one or more interfaces comprising one or more signal paths operable for communications with one or more memory systems; and

processing circuitry coupled with the one or more interfaces and configured to cause the host system to:

set a first storage state of a physical block of memory cells, the first storage state corresponding to at least one of a storage density of the physical block of memory cells or an access mode of the physical block of memory cells;

receive, from a memory system via a physical host interface, a report indicating a first health condition of a virtual block of memory cells associated with one or more physical blocks of memory cells comprising the physical block;

transmit, to the memory system, a command to monitor a second health condition of the physical block of memory cells based at least in part on one or more health metrics associated with the first health condition of the virtual block of memory cells satisfying a threshold;

monitor the second health condition of the physical block of memory cells based at least in part on the command, wherein the second health condition is based at least in part on two or more health metrics that the host system reads from a register stored at the memory system, and wherein the second health condition is based at least in part on a first duration to perform a read operation on the physical block of memory cells exceeding a first threshold duration and a second duration associated with writing logic states to the physical block of memory cells exceeding a second threshold duration, the two or more health metrics comprising the first duration and the second duration;

repurpose the physical block of memory cells from the first storage state to a second storage state based at least in part on the second health condition associated with the physical block of memory cells; and

access the physical block of memory cells based at least in part on the second storage state of the physical block of memory cells.

2 . The host system of claim 1 , wherein, to repurpose the physical block of memory cells from the first storage state to the second storage state, the processing circuitry is configured to cause the host system to:

update the storage density of the physical block of memory cells from a first storage density to a second storage density, wherein the first storage density is greater than the second storage density.

3 . The host system of claim 2 , wherein the first storage density comprises one of multi-level cell storage, triple level cell storage, or quad level cell storage and the second storage density comprises one of single level cell storage, multi-level cell storage, triple level cell storage, or quad level cell storage different from the first storage density.

4 . The host system of claim 1 , wherein, to repurpose the physical block of memory cells from the first storage state to the second storage state, the processing circuitry is configured to cause the host system to:

set the access mode of the physical block of memory cells to a read-only mode.

5 . The host system of claim 1 , wherein, to repurpose the physical block of memory cells from the first storage state to the second storage state, the processing circuitry is configured to cause the host system to:

reduce a threshold quantity of program-erase cycles that are performed on the physical block of memory cells.

6 . The host system of claim 1 , wherein the processing circuitry is further configured to cause the host system to:

perform a first write operation on the physical block of memory cells at the first storage state using one or more programming parameters;

repurpose the physical block of memory cells from the first storage state to the second storage state based at least in part on performing the first write operation; and

perform a second write operation on the physical block of memory cells at the second storage state using the one or more programming parameters based at least in part on repurposing the physical block of memory cells.

7 . The host system of claim 1 , wherein the processing circuitry is further configured to cause the host system to:

identify the two or more health metrics associated with the physical block of memory cells, wherein the second health condition associated with the physical block of memory cells is based at least in part on the two or more health metrics associated with the physical block of memory cells.

8 . The host system of claim 7 , wherein the processing circuitry is further configured to cause the host system to:

read, from the register stored at the memory system, the two or more health metrics associated with the physical block of memory cells based at least in part on transmitting the command, wherein identifying the two or more health metrics associated with the physical block of memory cells is based at least in part on reading the register.

9 . The host system of claim 7 , wherein the processing circuitry is further configured to cause the host system to:

receive, from the memory system, the two or more health metrics associated with the physical block of memory cells based at least in part on transmitting the command.

10 . The host system of claim 7 , wherein the two or more health metrics associated with the physical block of memory cells comprises the first duration to perform the read operation on the physical block of memory cells and the second duration associated with writing logic states to the physical block of memory cells and one or more of a third duration associated with erasing the logic states stored at the physical block of memory cells, a quantity of read operations performed on the physical block of memory cells, a quantity of write operations performed on the physical block of memory cells, a number of byte failures associated with the physical block of memory cells, or any combination thereof.

11 . The host system of claim 7 , wherein the processing circuitry is further configured to cause the host system to:

determine whether at least one health metric of the two or more health metrics associated with the physical block of memory cells satisfies a second threshold, wherein repurposing the physical block of memory cells from the first storage state to the second storage state is based at least in part on the at least one health metric satisfying the second threshold.

12 . A host system, comprising:

one or more interfaces comprising one or more signal paths operable for communications with one or more memory systems; and

processing circuitry coupled with the one or more interfaces and configured to cause the host system to:

set a respective storage state of one or more physical blocks of memory cells, the respective storage state corresponding to at least one of a respective storage density of the one or more physical blocks of memory cells or a respective access mode of the one or more physical blocks of memory cells;

receive, from a memory system via a physical host interface, a report indicating a first health condition of a virtual block of memory cells associated with the one or more physical blocks of memory cells;

transmit, to the memory system, a command to monitor a second health condition of a physical block of memory cells based at least in part on one or more health metrics associated with the first health condition of the virtual block of memory cells satisfying a threshold;

monitor the second health condition of the physical block of memory cells based at least in part on the command, wherein the one or more physical blocks of memory cells comprise the physical block of memory cells, wherein the second health condition is based at least in part on two or more health metrics that the host system reads from a register stored at the memory system, and wherein the second health condition is based at least in part on a first duration to perform a read operation on the physical block of memory cells exceeding a first threshold duration and a second duration associated with writing logic states to the physical block of memory cells exceeding a second threshold duration, the two or more health metrics comprising the first duration and the second duration;

select the physical block of memory cells from the one or more physical blocks of memory cells based at least in part on the second health condition; and

repurpose the physical block of memory cells from a first storage state to a second storage state based at least in part on selecting the physical block of memory cells, the first storage state comprising the respective storage state of the physical block of memory cells.

13 . The host system of claim 12 , wherein the processing circuitry is further configured to cause the host system to:

determine whether the one or more health metrics associated with the virtual block of memory cells satisfies the threshold, wherein selecting the physical block of memory cells is based at least in part on the one or more health metrics associated with the virtual block of memory cells satisfying the threshold, wherein the report indicates the one or more health metrics associated with the virtual block of memory cells.

14 . The host system of claim 13 , wherein the one or more health metrics associated with the virtual block of memory cells are each an average of one or more third health metrics associated with the one or more physical blocks of memory cells.

15 . The host system of claim 12 , wherein the processing circuitry is further configured to cause the host system to:

identify the two or more health metrics associated with the physical block of memory cells based at least in part on the command; and

determine whether each of the two or more health metrics associated with the physical block of memory cells satisfies a respective second threshold, wherein selecting the physical block of memory cells is based at least in part on each of the two or more health metrics associated with the physical block of memory cells satisfying the respective second threshold.

16 . The host system of claim 15 , wherein the processing circuitry is further configured to cause the host system to:

switch from a first granularity of health reporting to second granularity of health reporting, wherein the first granularity of health reporting is associated with reporting the one or more health metrics associated with the virtual block of memory cells and the second granularity of health reporting is associated with reporting the two or more health metrics associated with the physical block of memory cells, and wherein identifying the two or more health metrics associated with the physical block of memory cells is based at least part on switching from the first granularity of health reporting to the second granularity of health reporting.

17 . The host system of claim 15 , wherein the two or more health metrics associated with the physical block of memory cells comprises the first duration to perform the read operation on the physical block of memory cells and the second duration associated with writing logic states to the physical block of memory cells and one or more of a third duration associated with erasing the logic states stored at the physical block of memory cells, a quantity of read operations performed on the physical block of memory cells, a quantity of write operations performed on the physical block of memory cells, a number of byte failures associated with the physical block of memory cells, or any combination thereof.

18 . The host system of claim 12 , wherein, to repurpose the physical block of memory cells from the first storage state to the second storage state, the processing circuitry is configured to cause the host system to:

update the respective storage density of the physical block of memory cells from a first storage density to a second storage density, wherein the first storage density is greater than the second storage density.

19 . The host system of claim 12 , wherein, to repurpose the physical block of memory cells from the first storage state to the second storage state, the processing circuitry is configured to cause the host system to:

set the respective access mode of the physical block of memory cells to a read-only mode.

20 . The host system of claim 12 , wherein, to repurpose the physical block of memory cells from the first storage state to the second storage state, the processing circuitry is configured to cause the host system to:

reduce a threshold quantity of program-erase cycles that are performed on the physical block of memory cells.

21 . The host system of claim 12 , wherein the processing circuitry is further configured to cause the host system to:

perform a first write operation on the physical block of memory cells at the first storage state using one or more programming parameters;

repurpose the physical block of memory cells from the first storage state to the second storage state based at least in part on performing the first write operation; and

perform a second write operation on the physical block of memory cells at the second storage state using the one or more programming parameters based at least in part on updating the respective storage state of the physical block of memory cells.

22 . A non-transitory computer-readable medium storing code comprising instructions which, when executed by processing circuitry of an electronic device, cause the electronic device to:

set a first storage state of a physical block of memory cells, the first storage state corresponding to at least one of a storage density of the physical block of memory cells or an access mode of the physical block of memory cells;

receive, from a memory system via a physical host interface, a report indicating a first health condition of a virtual block of memory cells, the virtual block of memory cells associated with one or more physical blocks of memory cells comprising the physical block;

transmit, to the memory system, a command to monitor a second health condition of the physical block of memory cells based at least in part on one or more health metrics associated with the first health condition of the virtual block of memory cells satisfying a threshold;

monitor the second health condition of the physical block of memory cells based at least in part on the command, wherein the second health condition is based at least in part on two or more health metrics that the electronic device reads from a register stored at the memory system, and wherein the second health condition is based at least in part on a first duration to perform a read operation on the physical block of memory cells exceeding a first threshold duration and a second duration associated with writing logic states to the physical block of memory cells exceeding a second threshold duration, the two or more health metrics comprising the first duration and the second duration;

repurpose the physical block of memory cells from the first storage state to a second storage state based at least in part on the second health condition associated with the physical block of memory cells; and

access the physical block of memory cells based at least in part on the second storage state of the physical block of memory cells.

23 . The non-transitory computer-readable medium of claim 22 , wherein the instructions to repurpose the physical block of memory cells from the first storage state to the second storage state, when executed by the processing circuitry of the electronic device, cause the electronic device to:

update the storage density of the physical block of memory cells from a first storage density to a second storage density, wherein the first storage density is greater than the second storage density.

24 . The non-transitory computer-readable medium of claim 22 , wherein the instructions repurpose the physical block of memory cells from the first storage state to the second storage state, when executed by the processing circuitry of the electronic device, cause the electronic device to:

set the access mode of the physical block of memory cells to a read-only mode.