Systems, apparatuses, and methods for chained fused multiply add
Embodiments of systems, apparatuses, and methods for chained fused multiply add. In some embodiments, an apparatus includes a decoder to decode a single instruction having an opcode, a destination field representing a destination operand, a first source field representing a plurality of packed data source operands of a first type that have packed data elements of a first size, a second source field representing a plurality of packed data source operands that have packed data elements of a second size, and a field for a memory location that stores a scalar value. A register file having a plurality of packed data registers includes registers for the plurality of packed data source operands that have packed data elements of a first size, the source operands that have packed data elements of a second size, and the destination operand. Execution circuitry executes the decoded single instruction to perform iterations of packed fused multiply accumulate operations by multiplying packed data elements of the sources of the first type by sub-elements of the scalar value, and adding results of these multiplications to an initial value in a first iteration and a result from a previous iteration in subsequent iterations.
1 . A processor comprising:
a first memory to store a first plurality of source data elements;
a second memory to store a second plurality of source data elements;
execution circuitry to execute one or more instructions, the execution circuitry comprising a chain of multiply-accumulate units, each multiply-accumulate unit in the chain to perform an iteration of a multiply-accumulate operation with a respective subset of source data elements of the first plurality of source data elements, a respective subset of source data elements of the second plurality of source data elements, and an initial accumulation value, if provided, or an accumulation value from a prior multiply-accumulate unit in the chain of multiply-accumulate units, each multiply-accumulate unit comprising:
multiplier circuitry to multiply each source data element of the respective subset of source data elements of the first plurality of source data elements and a corresponding source data element of the respective subset of source data elements of the second plurality of source data elements to generate a plurality of products; and
adder circuitry to add the plurality of products and the initial accumulation value, if provided, or an accumulation value from a prior multiply-accumulate unit in the chain of multiply-accumulate units to generate a new accumulation value,
wherein the new accumulation value is a result accumulation value if the multiply-accumulate unit is a last multiply-accumulate unit in the chain of multiply-accumulate units or the new accumulation value is to be provided to a next multiply-accumulate unit in the chain, wherein the chain of multiply-accumulate units comprises four multiply-accumulate units connected in a chain to perform four iterations of the multiply-accumulate operation.
2 . The processor of claim 1 , wherein the first memory comprises a first source register and the second memory comprises a second source register.
3 . The processor of claim 2 , wherein the first source register and the second source register are packed data registers.
4 . The processor of claim 3 , wherein the result accumulation value is to be stored as a result data element in a destination register.
5 . The processor of claim 3 , wherein at least one of the one or more instructions comprises a multiply-accumulate instruction comprising a first source operand field indicating the subset of source data elements of the first plurality of source data elements and a second source operand field indicating the subset of source data elements of the first plurality of source data elements.
6 . The processor of claim 1 , wherein the first and second plurality of source data elements are a first size and the result accumulation value is a second size greater than the first size.
7 . The processor of claim 1 , further comprising:
fetch circuitry to fetch the one or more instructions; and
a decoder to decode the one or more instructions.
8 . The processor of claim 1 , wherein the one or more instructions comprises a single instruction.
9 . The processor of claim 8 , wherein a first plurality of source data elements and the second plurality of source data elements comprise signed word data elements and the initial accumulation value and the accumulation value from a prior multiply-accumulate unit in the chain of multiply-accumulate units comprise signed doublewords.
10 . A method, comprising:
storing a first plurality of source data elements in a first memory;
storing a second plurality of source data elements in a second memory;
executing one or more instructions by execution circuitry comprising a chain of multiply-accumulate units, each multiply-accumulate unit in the chain to perform an iteration of a multiply-accumulate operation with a respective subset of source data elements of the first plurality of source data elements, a respective subset of source data elements of the second plurality of source data elements, and an initial accumulation value, if provided, or an accumulation value from a prior multiply-accumulate unit in the chain of multiply-accumulate units, wherein each iteration of a multiply-accumulation operation comprises:
multiplying, by multiplier circuitry, each source data element of the respective subset of source data elements of the first plurality of source data elements and a corresponding source data element of the respective subset of source data elements of the second plurality of source data elements to generate a plurality of products; and
adding, by adder circuitry, the plurality of products and the initial accumulation value, if provided, or an accumulation value from a prior multiply-accumulate unit in the chain of multiply-accumulate units to generate a new accumulation value,
wherein the new accumulation value is a result accumulation value if the multiply-accumulate unit is a last multiply-accumulate unit in the chain of multiply-accumulate units or the new accumulation value is to be provided to a next multiply-accumulate unit in the chain.
11 . The method of claim 10 , wherein the first memory comprises a first source register and the second memory comprises a second source register.
12 . The method of claim 11 , wherein the first source register and the second source register are packed data registers.
13 . The method of claim 12 , wherein the result accumulation value is to be stored as a result data element in a destination register.
14 . The method of claim 12 , wherein at least one of the one or more instructions comprises a multiply-accumulate instruction comprising a first source operand field indicating the subset of source data elements of the first plurality of source data elements and a second source operand field indicating the subset of source data elements of the first plurality of source data elements.
15 . The method of claim 10 , wherein the first and second plurality of source data elements are a first size and the result accumulation value is a second size greater than the first size.
16 . The method of claim 10 , wherein the chain of multiply-accumulate units comprises four multiply-accumulate units connected in a chain to perform four iterations of the multiply-accumulate operation.
17 . The method of claim 16 , wherein the one or more instructions comprises a single instruction.
18 . The method of claim 17 , wherein a first plurality of source data elements and the second plurality of source data elements comprise signed word data elements and the initial accumulation value and the accumulation value from a prior multiply-accumulate unit in the chain of multiply-accumulate units comprise signed doublewords.
19 . A non-transitory machine-readable medium having program code stored thereon which, when executed by a machine, causes the machine to perform operations, comprising:
storing a first plurality of source data elements in a first memory;
storing a second plurality of source data elements in a second memory;
executing one or more instructions by execution circuitry comprising a chain of multiply-accumulate units, each multiply-accumulate unit in the chain to perform an iteration of a multiply-accumulate operation with a respective subset of source data elements of the first plurality of source data elements, a respective subset of source data elements of the second plurality of source data elements, and an initial accumulation value, if provided, or an accumulation value from a prior multiply-accumulate unit in the chain of multiply-accumulate units, wherein each iteration of a multiply-accumulation operation comprises:
multiplying, by multiplier circuitry, each source data element of the respective subset of source data elements of the first plurality of source data elements and a corresponding source data element of the respective subset of source data elements of the second plurality of source data elements to generate a plurality of products; and
adding, by adder circuitry, the plurality of products and the initial accumulation value, if provided, or an accumulation value from a prior multiply-accumulate unit in the chain of multiply-accumulate units to generate a new accumulation value,
wherein the new accumulation value is a result accumulation value if the multiply-accumulate unit is a last multiply-accumulate unit in the chain of multiply-accumulate units or the new accumulation value is to be provided to a next multiply-accumulate unit in the chain.