IP Library Granted Patent US 12681746
Granted Patent B2
US 12681746 · App. 18/113,912 · Granted Jul 14, 2026

Address-space-identifier-based security of data transfer requests

Inventors: Philip Ng (Toronto, CA); Nippon Raval (Markham, CA); Jeremy W. Powell (Austin, TX); Donald Matthews, Jr. (Ft. Collins, CO); David Kaplan (Austin, TX)
Assignees: Advanced Micro Devices, Inc.; ATI TECHNOLOGIES ULC
G06F9/45558G06F2009/45579G06F2009/45583G06F2009/45587
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Quick Facts
Patent No.
US 12681746
App. No.
18/113,912
Granted
Jul 14, 2026
Kind
B2
Abstract

A processor configured to execute one or more virtual machines (VMs) includes an input-output memory management unit (IOMMU) configured to handle memory-mapped input-output (MMIO) requests and direct memory access (DMA) requests from a processor core of the processor or one or more input/output (I/O) devices. In response to receiving an MMIO or DMA request, the IOMMU is configured to determine a VM associated with the request. The IOMMU then checks a security indicator field of an address space identifier (ASID) mask table to determine if the VM was previously the target of an attack by a malicious entity. In response to the VM previously being a target of an attack, the IOMMU denies the received MMIO or DMA request.

Claims (26)

1 . A method comprising:

in response to a transfer failure associated with a virtual machine (VM), modifying one or more bits of a security indicator field associated with an address space identifier (ASID) assigned to the VM to indicate that the VM was a target of an attack; and

in response to receiving a memory-mapped input/output (MMIO) request or direct memory access (DMA) request associated with the VM, preventing, at an input-output memory management circuitry, execution of the received MMIO request or DMA request based on the security indicator field indicating that the VM was a target of an attack.

2 . The method of claim 1 , further comprising:

executing, by the input-output memory management circuitry, the received MMIO request or DMA request in response to the security indicator field indicating the VM was not a target of an attack.

3 . The method of claim 1 , wherein the security indicator field is within an ASID mask table maintained by the input-output memory management circuitry.

4 . The method of claim 1 , wherein the security indicator field includes data indicating all DMA requests associated with the VM are not to be performed.

5 . The method of claim 1 , wherein the security indicator field includes data indicating all MMIO requests associated with the VM are not to be performed.

6 . The method of claim 1 , further comprising: modifying one or more bits in the security indicator field to indicate that the VM was not the target of an attack.

7 . A method, comprising:

in response to a transfer failure associated with a virtual machine (VM), modifying one or more bits of a security indicator field associated with an address space identifier (ASID) assigned to the VM to indicate that the VM was a target of an attack; and

preventing, at an input-output memory management circuitry, execution of a memory-mapped input/output (MMIO) request or a direct memory access (DMA) request for the (VM) in response to the security indicator field indicating the VM was a target of an attack.

8 . The method of claim 7 , further comprising:

executing, at the input-output memory management circuitry IOMMU, the MMIO request or DMA request for the VM in response to the security indicator field indicating the VM was not a target of an attack.

9 . The method of claim 7 , wherein the security indicator field includes data indicating all DMA requests from a specified input/output (I/O) device associated with the VM are not to be performed.

10 . The method of claim 7 , wherein the security indicator field includes data indicating all MMIO requests associated with the VM are not to be performed.

11 . The method of claim 7 , wherein the security indicator field is within an ASID mask table maintained by the input-output memory management circuitry.

12 . The method of claim 7 , further comprising: modifying one or more bits of the security indicator field to indicate that the VM was not the target of an attack.

13 . A processor comprising:

an input-output memory management circuitry configured to:

in response to a transfer failure associated with a virtual machine (VM), modifying one or more bits of a security indicator field associated with an address space identifier (ASID) assigned to the VM to indicate that the VM was a target of an attack; and

in response to receiving a memory-mapped input/output (MMIO) request or a direct memory access (DMA) request associated with the VM, prevent execution of the received MMIO request or DMA request based on the security indicator field indicating the VM was a target of an attack.

14 . The processor of claim 13 , wherein the input-output memory management circuitry is configured to: in response to the security indicator field indicating the VM was not a target of an attack, execute the received MMIO request or DMA request.

15 . The processor of claim 13 , wherein the security indicator field is within an ASID mask table maintained by the input-output memory management circuitry.

16 . The processor of claim 13 , wherein the security indicator field includes data indicating all MMIO requests associated with the VM are not to be performed.

17 . The processor of claim 13 , wherein the security indicator field includes data indicating all DMA requests associated with the VM are not to be performed.