Accelerated memory allocation

1 . A device for accelerating allocation of a region of a pool of a memory for computing devices processing, configured for:

in response to a request for allocation of the region of the pool of the memory by a process being executed by a processor, a memory allocator is configured to perform, in real-time, an accelerated allocation of said region of said pool of said memory by executing a single non-interruptible atomic operation without communicating with a memory manager, said single non-interruptible atomic operation comprising:

accessing a data structure indicating a state of allocation of the pool;

checking the data structure for a condition;

updating the data structure according to an outcome of the checking; and

returning an address of the data structure as the allocated region of the pool of the memory.

2 . The device of claim 1 , wherein the processor is designed according to a data-flow processing architecture.

3 . The device of claim 1 , wherein the processor is designed for a customized architecture designed to perform at least one of: signal processing, network routing, graphics, and telemetry.

4 . The device of claim 1 , wherein the memory allocator is further configured to release previously allocated memory in the single non-interruptible atomic operation, in response to a request to release the memory.

5 . The device of claim 4 , wherein the memory allocator is further configured to increase a counter designated for the pool in response to the request to release the memory, wherein a location of the counter is computed according to an address of the memory being freed, and the pool is returned to the memory manager in response to a value of the counter indicating that all memory in the pool is freed.

6 . The device of claim 4 , wherein the data structure comprises a bitmap, wherein the memory allocator is further configured to set a bit in the bitmap designated for the pool in response to the request to release the memory, the set bit indicating that the allocated region of the memory was released, wherein the pool is returned to the memory manager in response to a value of the bitmap indicating that all memory in the pool is freed, wherein memory allocator uses the bitmap for reusing released memory regions in future allocations.

7 . The device of claim 4 , wherein the data structure comprises a linked-list, wherein the memory allocator is further configured to write an entry in the linked-list in response to the request to release the memory, wherein the memory allocator uses the linked-list for reusing released memory chunks in future allocations.

8 . The device of claim 4 , wherein during the access of the data structure indicating the state of allocation of the pool, the single non-interruptible atomic operation further comprises reading the data structure implemented as one of a bitmap and a linked-list, and uses a previously released memory chunk for the accelerated allocation.

9 . The device of claim 1 , wherein the single non-interruptible atomic operation includes a sequence of the accessing, the checking, the updating, and the returning operations that cannot be interrupted once initiated.

10 . The device of claim 1 , wherein the single non-interruptible atomic operation operates sequentially in response to a request, wherein concurrent requests are sequentially processed.

11 . The device of claim 1 , wherein the single non-interruptible atomic operation excludes a request to the memory manager to obtain the pool of the memory, and/or excludes a request to the memory manager to return the pool to the memory, wherein the pool is allocated by the memory allocator.

12 . The device of claim 1 , wherein the memory is divided into a single area for each one of a plurality of size classes, each single area is further divided into a plurality of slots, a slot comprises the pool for allocation by the memory allocator for allocation sizes that match a size class corresponding to the pool, wherein the access of the data structure comprises checking a number of allocations previously performed for the slot indicating an amount of space remaining in the slot for allocation.

13 . The device of claim 12 , wherein the data structure includes a plurality of fields, wherein:

an offset field indicates an address of a next chunk of memory to be returned in response to a next request,

a counter field indicating the number of allocations previously performed for the slot;

a validity field used for a first allocation of the single area indicating that the memory allocator has not yet been initialized for the single area; and

an overflow field indicates whether the offset field points to a valid allocation.

14 . The device of claim 13 , wherein the check of the data structure for the condition comprises:

in response to a validity field bit being unset or the overflow field being set, the overflow field is set,

wherein when said validity field bit is set and the overflow field is unset, the offset field is increased by a size of the allocated region, and a counter field is increased by 1.

15 . The device of claim 14 , wherein the check of the data structure for the condition comprises:

in response to the counter field increasing by 1, the counter field overflows into the data structure, and the offset field value prior to the increase by the size of the allocated region is returned.

16 . The device of claim 15 , wherein the processor further executes a code for:

in response to the validity field being unset, or the overflow field having a first value, requesting a new pool from the memory manager;

in response to the overflow field having a second value indicating another request for a new pool is being made from the memory manager, waiting a time interval for the another request to complete, and requesting the new pool from the memory manager; and

wherein when the validity field being set and the overflow field does not have said first or second value, use the offset field to determine the allocated region.

17 . The device of claim 1 , wherein the pool is divided into regions of arbitrary sizes.

18 . The device of claim 17 , wherein the data structure includes a plurality of fields, wherein:

an offset field indicates an address of a next chunk of memory to be returned in response to a next request,

a size field indicating a size of the pool, and

an overflow field indicates whether the offset field points to a valid allocation.

19 . The device of claim 18 , wherein the update to the data structure comprises:

in response to a total allocated size of a slot comprising the pool being increased beyond a total size of the slot, setting the overflow field to a first value;

in response to receiving another allocation request when the overflow field is set to the first value, setting the overflow field to a second value;

wherein the processor executes a code for requesting another pool in response to the first value, and waiting for a previous task to complete in response to the second value.

20 . A method for accelerating allocation of a region of a pool of a memory for computing devices processing, comprising:

performing in real-time, an accelerated allocation of the region of the pool of the memory by executing, in response to a request for allocation of said region of said pool of said memory, wherein said accelerated allocation is conducted in a single non-interruptible atomic operation without communicating with a memory manager, said single non-interruptible atomic operation comprising:

accessing a data structure indicating a state of allocation of the pool;

checking the data structure for a condition;

updating the data structure according to an outcome of the checking; and

returning an address of the data structure as the allocated region of the pool of the memory.

21 . A non-transitory medium storing program instructions for execution by at least one processor conducting accelerated allocation of a region of a pool of a memory; for use by computing devices processing, said program instructions, when executed by the at least one processor, cause the at least one processor to:

perform in real-time, an accelerated allocation of the region of the pool of the memory by executing, in response to a request for allocation of said region of said pool of said memory, wherein said accelerated allocation is conducted in a single non-interruptible atomic operation without communicating with a memory manager, said single non-interruptible atomic operation comprising:

accessing a data structure indicating a state of allocation of the pool;

checking the data structure for a condition;

updating the data structure according to an outcome of the checking; and

returning an address of the data structure as the allocated region of the pool of the memory.