Volatile memory schema for safe state configuration

1 . A driver circuit comprising:

a volatile memory connected to a plurality of independent power supplies, the volatile memory configured to store a fail-safe configuration for the driver circuit; and

driver logic connected to the volatile memory, the driver logic configured to:

in response to startup of the driver circuit, receive, from a host controller, a digital write communication that specifies the fail-safe configuration;

write the fail-safe configuration into the volatile memory;

responsive to writing the fail-safe configuration into the volatile memory, lock the volatile memory;

determine to enter a fail-safe state; and

in response to determining to enter the fail-safe state, configure the driver circuit or a power switch according to the fail-safe configuration stored in the volatile memory.

2 . The driver circuit of claim 1 , wherein to receive the digital write communication that specifies the fail-safe configuration, the driver logic is configured to:

receive, from the host controller, a pattern of writes to the volatile memory;

determine that the pattern of writes matches a specified pattern of writes that unlocks the volatile memory; and

in response to determining the pattern of writes matches the specified pattern of writes, unlock the volatile memory.

3 . The driver circuit of claim 1 , wherein to write the fail-safe configuration into the volatile memory, the driver logic is further configured to:

in response to receiving the digital write communication that specifies the fail-safe configuration, determine a checksum of the fail-safe configuration;

output the checksum of the fail-safe configuration to a supervision device;

in response to outputting the checksum of the fail-safe configuration to the supervision device, receive, from the supervision device, a signal that indicates the checksum of the fail-safe configuration is valid; and

in response to receiving the signal that indicates the checksum of the fail-safe configuration is valid, write the fail-safe configuration into the volatile memory.

4 . The driver circuit of claim 1 , wherein to determine to enter the fail-safe state, the driver circuit is configured to:

receive a request to enter the fail-safe state; and

in response to receiving the request to enter the fail-safe state, enter the fail-safe state.

5 . The driver circuit of claim 4 , wherein to receive the request to enter the fail-safe state, the driver logic is configured to:

receive a limp home request from a supervision device indicative of failure of the host controller that controls the driver circuit.

6 . The driver circuit of claim 4 , wherein the driver logic is further configured to:

in response to receiving the request to enter the fail-safe state, block digital write communication to the volatile memory.

7 . The driver circuit of claim 1 , wherein the volatile memory is configured to receive a trickle supply from one of the plurality of independent power supplies while the driver circuit is in a sleep state.

8 . The driver circuit of claim 7 ,

wherein the volatile memory is configured to store a default start-up configuration for the driver circuit; and

wherein the driver logic is further configured to:

while the driver circuit is in the sleep state, receive a wake up request; and

in response to receiving the wake up request, configure the driver circuit or the power switch according to the default start-up configuration stored in the volatile memory.

9 . The driver circuit of claim 1 , wherein the power switch is configured to control power supplied to an actuator in a vehicle.

10 . A method comprising:

in response to startup of a driver circuit, receiving, by the driver circuit and from a host controller, a digital write communication that specifies a fail-safe configuration;

writing, by the driver circuit, the fail-safe configuration into volatile memory of the driver circuit, the volatile memory connected to a plurality of independent power supplies; and

responsive to writing the fail-safe configuration into the volatile memory, locking, by the driver circuit, the volatile memory;

storing, in the volatile memory of a driver circuit, the fail-safe configuration for the driver circuit;

determining, by the driver circuit, to enter a fail-safe state; and

in response to determining to enter the fail-safe state, configuring, by the driver circuit, the driver circuit or a power switch according to the fail-safe configuration stored in the volatile memory.

11 . The method of claim 10 , wherein receiving the digital write communication that specifies the fail-safe configuration further comprises:

receiving, by the driver circuit and from the host controller, a pattern of writes to the volatile memory;

determining, by the driver circuit, that the pattern of writes matches a specified pattern of writes that unlocks the volatile memory; and

in response to determining the pattern of writes matches the specified pattern of writes, unlocking, by the driver circuit, the volatile memory.

12 . The method of claim 10 , wherein writing the fail-safe configuration into the volatile memory further comprises:

in response to receiving the digital write communication that specifies the fail-safe configuration, determining, by the driver circuit, a checksum of the fail-safe configuration;

outputting, by the driver circuit, the checksum of the fail-safe configuration to a supervision device;

in response to outputting the checksum of the fail-safe configuration to the supervision device, receiving, by the driver circuit and from the supervision device, a signal that indicates the checksum of the fail-safe configuration is valid; and

in response to receiving the signal that indicates the checksum of the fail-safe configuration is valid, writing, by the driver circuit, the fail-safe configuration into the volatile memory.

13 . The method of claim 10 , wherein determining to enter the fail-safe state further comprises:

receiving, by the driver circuit, a request to enter the fail-safe state; and

in response to receiving the request to enter the fail-safe state, entering, by the driver circuit, the fail-safe state.

14 . The method of claim 13 , wherein receiving the request to enter the fail-safe state further comprises:

receiving, by the driver circuit, a limp home request from a supervision device indicative of failure of host controller that controls the driver circuit.

15 . The method of any of claim 10 , wherein the volatile memory receives a trickle supply from one of the plurality of independent power supplies while the driver circuit is in a sleep state.

16 . The method of claim 15 , wherein the volatile memory stores a default start-up configuration for the driver circuit, further comprising:

while the driver circuit is in the sleep state, receiving, by the driver circuit, a wake up request; and

in response to receiving the wake up request, configuring, by the driver circuit, the driver circuit or the power switch according to the default start-up configuration stored in the volatile memory.

17 . The method of any of claim 10 , wherein the power switch is configured to control power supplied to an actuator in a vehicle.

18 . A system, comprising:

an actuator;

a power switch configured to control power supplied to the actuator;

a driver circuit configured to control the power switch;

a host controller configured to control the driver circuit; and

a supervision device configured to:

detect a failure in the host controller; and

in response to detecting the failure in the host controller, send, to the driver circuit, a request to enter a fail-safe state;

wherein the driver circuit comprises:

a volatile memory connected to a plurality of independent power supplies, the volatile memory configured to store a fail-safe configuration for the driver circuit; and

driver logic connected to the volatile memory, the driver logic configured to:

in response to startup of the driver circuit, receive, from the host controller, a digital write communication that specifies the fail-safe configuration;

write the fail-safe configuration into the volatile memory;

responsive to writing the fail-safe configuration into the volatile memory, lock the volatile memory;

receive the request to enter a fail-safe state; and

in response to receiving the request to enter the fail-safe state, configure the driver circuit or the power switch according to the fail-safe configuration stored in the volatile memory.