IP Library › Granted Patent US 12681798
Granted Patent B2
US 12681798 · App. 18/939,193 · Granted Jul 14, 2026

Configuration method of a microcontroller

Inventor: Jawad Benhammadi (Pont de Claix, FR)
Assignee: STMicroelectronics International N.V
G06F11/0793G06F9/4403G06F9/441G06F11/1004
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Quick Facts
Patent No.
US 12681798
App. No.
18/939,193
Granted
Jul 14, 2026
Kind
B2
Abstract

The present description concerns a method of configuration of a microcontroller provided with a non-volatile memory, wherein, during an implementation of an operation of loading of the microcontroller configuration based on data from the non-volatile memory, if a fault is detected, then a new configuration loading operation is implemented at least once without for the microcontroller to be powered off.

Claims (28)

1 . A method of configuration of a microcontroller provided with a non-volatile memory, comprising:

during an implementation of an operation of loading of the a configuration of the microcontroller based on data from the non-volatile memory:

responsive to detecting a fault, restarting the operation of loading the configuration at least once without needing for the microcontroller to be powered off; and

responsive to restarting the operation of loading the configuration a threshold number of times, setting the microcontroller to be inaccessible in read or write mode.

2 . The method according to claim 1 , wherein during the implementation of an operation of loading of the microcontroller configuration from the non-volatile memory, responsive to no fault detected, a method of booting the microcontroller is implemented.

3 . The method according to claim 1 , wherein a counter is incremented at each new consecutive implementation of the loading operation linked to a fault detection.

4 . The method according to claim 3 , wherein, when the counter exceeds a threshold N, the microcontroller is set to a locking mode.

5 . The method according to claim 4 , wherein, from the time when the microcontroller has been set to the locking mode, only a powering off of the microcontroller enables a new operation of loading of a configuration of the microcontroller from the non-volatile memory to be implemented.

6 . The method according to claim 1 , wherein detecting the fault is implemented by comparison of error correction codes (ECCs).

7 . The method according to claim 1 , wherein detecting the fault is implemented by comparison of cyclic redundancy codes (CRCs).

8 . The method according to claim 1 , wherein detecting the fault is implemented based on data from the non-volatile memory.

9 . The method according to claim 8 , wherein detecting the fault is implemented by a memory interface of the microcontroller.

10 . The method according to claim 1 , wherein the non-volatile memory is a MRAM-type memory.

11 . The method according to claim 1 , wherein the non-volatile memory is a memory of phase change type.

12 . A microcontroller provided with a non-volatile memory, wherein the microcontroller is configured to:

during an implementation of an operation of loading of a configuration of the microcontroller based on data from the non-volatile memory:

responsive to detecting a fault, cause restarting the operation of loading the configuration at least once without needing for the microcontroller to be powered off; and

responsive to restarting the operation of loading the configuration a threshold number of times, cause the microcontroller to be inaccessible in read or write mode.

13 . The microcontroller according to claim 12 , wherein during the implementation of an operation of loading of the microcontroller configuration from the non- volatile memory, responsive to no fault detected, a method of booting the microcontroller is implemented.

14 . The microcontroller according to claim 12 , wherein a counter is incremented at each new consecutive implementation of the loading operation linked to a fault detection.

15 . The microcontroller according to claim 14 , wherein, when the counter exceeds a threshold N, the microcontroller is set to a locking mode.

16 . The microcontroller according to claim 15 , wherein, from the time when the microcontroller has been set to the locking mode, only a powering off of the microcontroller enables a new operation of loading of a configuration of the microcontroller from the non-volatile memory to be implemented.

17 . The microcontroller according to claim 12 , wherein detecting the fault is implemented by comparison of error correction codes (ECCs).

18 . The microcontroller according to claim 12 , wherein detecting the fault is implemented by comparison of cyclic redundancy codes (CRCs).

19 . The microcontroller according to claim 12 , wherein detecting the fault is implemented based on data from the non-volatile memory.

20 . The microcontroller according to claim 19 , wherein detecting the fault is implemented by a memory interface of the microcontroller.

21 . The microcontroller according to claim 12 , wherein the non-volatile memory is a MRAM-type memory.

22 . The microcontroller according to claim 12 , wherein the non-volatile memory is a memory of phase change type.