Storage device and method of operating the same where parity data of target logical page is stored in different parity areas

1 . A storage device, comprising:

a memory device including a plurality of super blocks, each super block including: a plurality of logical pages configured to store a plurality of pieces of logical page data; and a plurality of parity areas configured to store a plurality of pieces of parity data corresponding to the plurality of pieces of logical page data; and

a memory controller in communication with the memory device and configured to: determine target logical page data corresponding to a target logical page of the plurality of logical pages based on at least one of a read count or an erase count of a first super block of the plurality of super blocks; and control the memory device to store first parity data, corresponding to the target logical page data, in: (1) a first parity area of the plurality of parity areas that is allocated to the first parity data; and (2) at least a portion of a second parity area that is allocated to remaining pieces of parity data other than the first parity data.

2 . The storage device according to claim 1 , wherein:

the memory device comprises a plurality of dies, each of the plurality of dies including a plurality of planes, each of the plurality of planes including a plurality of memory blocks; and

the first super block includes corresponding memory blocks of the plurality of memory blocks included in different dies among the plurality of dies, or corresponding memory blocks of the plurality of memory blocks included in different planes among the plurality of planes.

3 . The storage device according to claim 1 , wherein the target logical page data is logical page data with a higher probability of read failure, during read operation, than logical page data corresponding to other logical pages.

4 . The storage device according to claim 1 , wherein the memory controller is configured to, in response to determination that the read count is greater than a first threshold, determine MSB page data to be the target logical page data.

5 . The storage device according to claim 1 , wherein the memory controller is configured to: in response to determination that the read count is less than or equal to a first threshold, read the plurality of pieces of logical page data from at least one word line connected to the first super block; and determine the target logical page data based on a number of fail bits included in the read plurality of pieces of logical page data.

6 . The storage device according to claim 5 , wherein the memory controller is configured to, in response to determination that the number of fail bits, included in MSB page data among the read plurality of pieces of logical page data, is greater than a second threshold, determine the MSB page data to be the target logical page data.

7 . The storage device according to claim 5 , wherein the memory controller is configured to, in response to determination that i) the number of fail bits, included in MSB page data among the read plurality of pieces of logical page data, is greater than a second threshold and ii) a second number of fail bits, included in remaining pieces of logical page data other than the MSB page data among the read plurality of pieces of logical page data is less than or equal to the second threshold, determine the MSB page data to be the target logical page data.

8 . The storage device according to claim 5 , wherein the memory controller is configured to, in response to determination that i) the number of fail bits, included in MSB page data among the read plurality of pieces of logical page data, is greater than a second threshold and ii) a second number of fail bits, included in remaining pieces of logical page data other than the MSB page data among the read plurality of pieces of logical page data, is less than or equal to a third threshold that is less than the second threshold, determine the MSB page data to be the target logical page data.

9 . The storage device according to claim 1 , wherein the memory controller is configured to: in response to determination that i) the read count is less than a fourth threshold and ii) the erase count is less than a fifth threshold, read the plurality of pieces of logical page data from at least one word line connected to the first super block; and determine the target logical page data based on a number of fail bits included in the read plurality of pieces of logical page data.

10 . The storage device according to claim 9 , wherein the memory controller is configured to, in response to determination that the number of fail bits, included in LSB page data among the read plurality of pieces of logical page data, is greater than a sixth threshold, determine the LSB page data to be the target logical page data.

11 . The storage device according to claim 9 , wherein the memory controller is configured to, in response to determination that i) the number of fail bits, included in LSB page data among the read plurality of pieces of logical page data, is greater than a sixth threshold and ii) a second number of fail bits, included in remaining pieces of logical page data other than the LSB page data among the read plurality of pieces of logical page data, is less than or equal to the sixth threshold, determine the LSB page data to be the target logical page data.

12 . The storage device according to claim 9 , wherein the memory controller is configured to, in response to determination that i) the number of fail bits, included in LSB page data among the read plurality of pieces of logical page data, is greater than a sixth threshold and ii) a second number of fail bits, included in remaining pieces of logical page data other than the LSB page data among the read plurality of pieces of logical page data, is less than or equal to a seventh threshold that is less than the sixth threshold, determine the LSB page data to be the target logical page data.

13 . The storage device according to claim 1 , wherein the memory controller is configured to: generate second parity data corresponding to remaining pieces of logical page data, other than the target logical page data, among the plurality of pieces of logical page data; and control the memory device to store the second parity data in a remaining second parity area other than at least the portion of the second parity area.

14 . The storage device according to claim 13 , wherein the memory controller is configured to perform a data recovery operation on the remaining pieces of logical page data based on the second parity data.

15 . The storage device according to claim 1 , wherein the memory controller is configured to, in response to determination that an operation of migrating data from the first super block to a second super block is triggered, determine the target logical page data based on at least one of the read count or the erase count.

16 . A method of operating a storage device, the storage device including a memory area including: a plurality of logical pages configured to store a plurality of pieces of logical page data; and a plurality of parity areas configured to store a plurality of pieces of parity data corresponding to the plurality of pieces of logical page data, the method comprising:

determining a read count of the memory area is greater than a first threshold;

determining most significant bit (MSB) page data, among the plurality of pieces of logical page data, to be target logical page data based on determining the read count of the memory area is greater than a first threshold;

generating first parity data corresponding to the target logical page data;

storing the first parity data i) in a first parity area, among the plurality of parity areas, that is allocated to the first parity data and ii) in at least a portion of a second parity area that is allocated to remaining pieces of parity data other than the first parity data;

generating second parity data corresponding to remaining pieces of logical page data; and

storing the second parity data in a remaining second parity area other than at least the portion of the second parity area.

17 . The method according to claim 16 , further comprising:

reading the plurality of pieces of logical page data from at least one word line connected to a second memory area in response to determination that a second read count of the second memory area is less than or equal to the first threshold; and

determining a second MSB page data to be a second target logical page data based on a number of fail bits included in the read plurality of pieces of logical page data.

18 . A method of operating a storage device, the storage device including a memory area including: a plurality of logical pages configured to store a plurality of pieces of logical page data; and a plurality of parity areas configured to store a plurality of pieces of parity data corresponding to the plurality of pieces of logical page data, the method comprising:

determining a read count of the memory area is less than a first threshold;

determining an erase count of the memory area is less than a second threshold;

determining least significant bit (LSB) page data, among the plurality of pieces of logical page data, to be target logical page data based on determining i) the read count is less than the first threshold and ii) the erase count is less than the second threshold;

generating first parity data corresponding to the target logical page data;

storing the first parity data i) in a first parity area, among the plurality of parity areas, that is allocated to the first parity data and ii) in at least a portion of a second parity area that is allocated to remaining pieces of parity data other than the first parity data;

generating second parity data corresponding to remaining pieces of logical page data; and

storing the second parity data in a remaining second parity area other than at least the portion of the second parity area.

19 . The method according to claim 18 , wherein determining the LSB page data to be the target logical page data comprises:

reading the plurality of pieces of logical page data from at least one word line connected to the memory area in response to determination that i) the read count is less than the first threshold and ii) the erase count is less than the second threshold; and

determining the LSB page data to be the target logical page data based on a number of fail bits included in the read plurality of pieces of logical page data.