IP Library › Granted Patent US 12681875
Granted Patent B2
US 12681875 · App. 18/642,795 · Granted Jul 14, 2026

Inter-drive communication for cooperative operations

Inventor: Marc Timothy Jones (Longmont, CO)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
G06F13/1673
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Quick Facts
Patent No.
US 12681875
App. No.
18/642,795
Filed
Apr 22, 2024
Granted
Jul 14, 2026
Kind
B2
Examiner
PHAN, DEAN
Art Unit
2184
USPC
710/310
Abstract

A system is disclosed. The system may include two devices, along with a processor to communicate with the two devices. A buffer may store an entry including a communication from one device to the other device.

Claims (77)

1 . A system, comprising:

a first device, the first device including a first memory;

a second device, the second device including a second memory;

a processor to communicate with the first device and the second device, the processor associated with a memory of the system;

a first buffer in the first memory of the first device to store a first entry including a first communication from the second device to the first device, the first entry stored in the first buffer in the first memory of the first device by the second device;

a second buffer in the second memory of the second device to store a second entry including a second communication from the first device to the second device, the second entry stored in the second buffer in the second memory of the second device by the first device;

a third buffer to store a third entry including a third communication from the processor to the first device; and

a fourth buffer to store a fourth entry including a fourth communication from the processor to the second device.

2 . The system according to claim 1 , wherein the first buffer includes a ring buffer.

3 . The system according to claim 1 , wherein the processor is further configured to send a notification to the first device and the second device about the first buffer in the first memory of the first device and the second buffer in the second memory of the second device.

4 . The system according to claim 1 , wherein the second communication includes advertising a capability of the first device, analytics of the first device, redirection of a write request received at the first device from the processor, garbage collection coordination, or execution of a computational function of the second device.

5 . The system according to claim 1 , wherein the processor is configured to establish the first buffer in the first memory of the first device and the second buffer in the second memory of the second device based at least in part on the processor identifying the first device and the second device.

6 . The system according to claim 1 , wherein:

the first device is configured to establish the first buffer in the first memory of the first device; and

the second device is configured to establish the second buffer in the second memory of the second device.

7 . The system according to claim 1 , further comprising:

a third device; and

a lock mechanism associated with the first buffer to control access to the first buffer,

wherein the second device is configured to store the first entry in the first buffer in the first memory of the first device based at least in part on the lock mechanism, and

wherein the third device is configured to store a fifth entry in the first buffer in the first memory of the first device based at least in part on the lock mechanism.

8 . The system according to claim 1 , wherein:

the first device includes a first storage device; and

the second device includes a second storage device.

9 . The system according to claim 1 , wherein:

the second entry includes a submission packet structure; and

the first entry includes a completion packet structure.

10 . The system according to claim 1 , wherein the first communication includes a response to the second communication.

11 . A method, comprising:

establishing a first buffer in a first memory of a first device;

establishing a second buffer in a second memory of a second device;

identifying, at the first device in a system, the second device to which a second communication is to be directed;

establishing a second entry by the first device, the second entry including the second communication;

placing the second entry in the second buffer of the second memory of the second device by the first device for delivery to the second device,

identifying, at the second device in the system, the first device to which a first communication is to be directed;

establishing a first entry by the second device, the first entry including the first communication;

placing the first entry in the first buffer of the first memory of the first device by the second device for delivery to the first device,

wherein the first device retrieves the first entry from the first buffer in the first memory of the first device,

wherein the second device retrieves the second entry from the second buffer in the second memory of the second device, and

wherein the system further includes:

a processor;

a memory associated with a processor;

a third buffer to store a third entry including a third communication from a processor to the first device; and

a fourth buffer to store a fourth entry including a fourth communication from the processor to the second device.

12 . The method according to claim 11 , wherein the second communication includes advertising a capability of the first device, analytics of the first device, redirection of a write request received at the first device from the processor, garbage collection coordination, or execution of a computational function of the second device.

13 . The method according to claim 11 , wherein:

establishing the first buffer in the first memory of the first device includes establishing the first buffer in the first memory of the first device by the processor; and

establishing the second buffer in the second memory of the second device includes establishing the second buffer in the second memory of the second device by the processor.

14 . The method according to claim 11 , wherein:

establishing the first buffer in the first memory of the first device includes establishing the first buffer in the first memory of the first device by the first device; and

establishing the second buffer in the second memory of the second device includes establishing the second buffer in the second memory of the second device by the second device.

15 . The method according to claim 11 , wherein:

placing the first entry in the first buffer of the first memory of the first device by the second device for delivery to the first device includes securing for the second device a lock mechanism associated with the first buffer in the first memory of the first device; and

the system further includes a third device configured to place a fifth entry in the first buffer in the first memory of the first device based at least in part on the lock mechanism.

16 . The method according to claim 11 , wherein:

the first device includes a first storage device; and

the second device includes a second storage device.

17 . The method according to claim 11 , wherein:

the second entry includes a submission packet structure; and

the first entry includes a completion packet structure.

18 . The method according to claim 11 , wherein the first communication includes a response to the second communication.

19 . An article, comprising a non-transitory storage medium, the non-transitory storage medium having stored thereon instructions that, when executed by a machine, result in:

establishing a first buffer in a first memory of a first device;

establishing a second buffer in a second memory of a second device;

identifying, at the first device in a system, the second device to which a second communication is to be directed;

establishing a second entry by the first device, the second entry including the second communication;

placing the second entry in the second buffer of the second memory of the second device by the first device for delivery to the second device,

identifying, at the second device in the system, the first device to which a first communication is to be directed;

establishing a first entry by the second device, the first entry including the first communication;

placing the first entry in the first buffer of the first memory of the first device by the second device for delivery to the first device,

wherein the first device retrieves the first entry from the first buffer in the first memory of the first device,

wherein the second device retrieves the second entry from the second buffer in the second memory of the second device, and

wherein the system further includes:

a processor;

a memory associated with a processor;

a third buffer to store a third entry including a third communication from a processor to the first device; and

a fourth buffer to store a fourth entry including a fourth communication from the processor to the second device.

20 . The article according to claim 19 , wherein the second communication includes advertising a capability of the first device, analytics of the first device, redirection of a write request received at the first device from the processor, garbage collection coordination, or execution of a computational function of the second device.