Data transmission on I2C bus

1 . A method of transmission over an I2C bus having a data line and a clock line, the method comprising:

applying a transmit function to transmit data to generate a first data and a second data, wherein the first data comprises the transmit data having an intentional error introduced therein and wherein the second data comprises error correction data derived from the transmit data;

transmitting, to a receiver, the first data over a first channel of the data line of the I2C bus;

transmitting, to the receiver, the second data over a second channel of the data line of the I2C bus, the second channel being temporally distinct from the first channel;

receiving, from the receiver, information representative of data recovered from the first data and the second data; and

authenticating the receiver based on whether the received information indicates that the receiver applied a receive function to the first data and the second data, the receive function being related to the transmit function.

2 . The method of claim 1 , wherein transmitting the second data over the second channel comprises encoding the second data as a pulse signal generated during a low phase of a clock signal (SCL) carried on the clock line of the I2C bus, the second data being transmitted outside a validation period of the first data.

3 . The method of claim 1 , wherein the intentional error is introduced such that a receiver possessing the receive function can recover the transmit data but a receiver lacking the receive function cannot.

4 . The method of claim 3 , wherein the intentional error introduced into the first data comprises a number of bit errors within a correctable range of the error correction data.

5 . The method of claim 1 , wherein applying the transmit function comprises:

applying an error function to the transmit data to generate the first data having the intentional error; and

applying an error correction code to the transmit data to generate the second data, wherein a number of bits altered by the error function is within a correction capacity of the error correction code.

6 . The method of claim 1 , further comprising:

prior to transmitting the first data and the second data, transmitting a configuration signal to the receiver indicating that transmission will occur over two temporally distinct channels of the data line with error correction enabled; and

receiving a status response from the receiver confirming readiness to receive dual-channel transmission.

7 . The method of claim 1 wherein the second data has fewer bits than the transmit data.

8 . The method of claim 1 , further comprising:

receiving the first data by the receiver;

receiving the second data by the receiver; and

applying, by the receiver, the receive function to the received first and second data.

9 . The method of claim 8 , wherein applying the receive function comprises transforming the received first and second data into receive data corresponding to the transmit data and wherein the information related to the first data and the second data comprises the receive data.

10 . A method of transmission over an I2C bus having a data line and a clock line, the method comprising:

receiving, by a receiver, a configuration signal from a transmitter indicating that subsequent transmission will occur over two temporally distinct channels of the data line of the I2C bus with error correction enabled;

transmitting, by the receiver, a status response to the transmitter confirming readiness to receive dual-channel transmission;

receiving, by the receiver, first data over a first channel of the data line of the I2C bus, wherein the first data comprises transmit data having an intentional error introduced therein;

receiving, by the receiver, second data over a second channel of the data line of the I2C bus, the second channel being temporally distinct from the first channel, wherein the second data comprises error correction data derived from the transmit data;

applying, by the receiver, a receive function to the first data and the second data to recover the transmit data, the receive function being related to a transmit function applied by the transmitter to generate the first data and the second data; and

transmitting, by the receiver, a handshake response to the transmitter, the handshake response comprising information representative of the recovered transmit data, whereby the transmitter can authenticate the receiver based on the handshake response.

11 . The method of claim 10 , wherein receiving the second data over the second channel comprises detecting a pulse signal generated during a low phase of a clock signal (SCL) carried on the clock line of the I2C bus, the pulse signal being present outside a validation period of the first data.

12 . The method of claim 10 , wherein applying the receive function comprises:

applying an error correction code to the first data using the second data to identify and correct bits altered by the intentional error; and

recovering the transmit data from the corrected bits, wherein a number of bits corrected is within a correction capacity of the error correction code.

13 . The method of claim 10 , wherein the second data has fewer bits than the transmit data.

14 . A system comprising:

an I2C bus having a data line and a clock line;

a transmitter coupled to the I2C bus, wherein the transmitter is configured to apply a transmit function to transmit data to generate a first data and a second data, wherein the first data comprises the transmit data having an intentional error introduced therein and wherein the second data comprises error correction data derived from the transmit data, the first data and the second data being linked to each other by the transmit function; and

a receiver coupled to the I2C bus, wherein the receiver is configured to apply a receive function to received first data and second data to recover the transmit data by correcting the intentional error using the second data, the receive function being complementary to the transmit function;

wherein the transmitter and the receiver are configured to communicate such that:

the transmitter transmits, to the receiver, the first data over a first channel of the data line of the I2C bus and transmits the second data over a second channel of the data line of the I2C bus, the second channel being temporally distinct from the first channel; and

the receiver transmits, to the transmitter, a handshake response comprising information representative of data recovered by the receiver from the first data and the second data so that the transmitter authenticates the receiver by determining that the handshake response demonstrates successful application of the receive function to the first and second data.

15 . The system of claim 14 , wherein the transmitter is configured to authenticate the receiver by determining that the handshake response demonstrates successful recovery of the transmit data from the first data having the intentional error, whereby successful recovery is only achievable by application of the receive function that is complementary to the transmit function.

16 . The system of claim 14 , further comprising a memory circuit that comprises a lookup table between a set of first data and a set of second data.

17 . The system of claim 14 , wherein the transmitter comprises circuitry of a printer and the receiver comprises circuitry of a cartridge.

18 . An apparatus comprising:

an error introduction circuit configured to apply an error function to transmit data to generate first data having an intentional error introduced therein, wherein a number of bits altered by the error function is within a correction capacity of an error correction code;

an error correction circuit configured to apply the error correction code to the transmit data to generate second data comprising error correction data derived from the transmit data, the first data and the second data being linked to each other such that a receiver possessing a receive function complementary to the error correction code can recover the transmit data from the first data using the second data;

a transmit circuit configured to transmit the first data over a first channel of a data line of an I2C bus and transmit the second data over a second channel of the data line of the I2C bus, the second channel being temporally distinct from the first channel;

a receive circuit configured to receive a handshake response comprising information representative of data recovered from the first data and the second data; and

an authentication circuit configured to perform authentication of a receiver providing the handshake response by determining whether the handshake response demonstrates successful recovery of the transmit data from the first data having the intentional error, whereby successful recovery is only achievable by application of the receive function complementary to the error correction code.

19 . The apparatus of claim 18 , wherein the authentication circuit is configured to authenticate the receiver providing the handshake response by determining that the handshake response demonstrates successful recovery of the transmit data.

20 . The apparatus of claim 18 , wherein the transmit circuit is further configured to transmit, prior to transmitting the first and second data, a configuration signal indicating that subsequent transmission will occur over two temporally distinct channels of the data line of the I2C bus.

21 . The apparatus of claim 18 , wherein the transmit circuit is further configured to encode the second data as a pulse signal generated during a low phase of a clock signal (SCL) of the I2C bus, the pulse signal being transmitted outside a validation period of the first data.

22 . The apparatus of claim 18 , wherein the error introduction circuit and the error correction circuit are configured to operate in parallel on the same transmit data such that the error introduction circuit applies the error function to the transmit data to generate the first data independently of the error correction circuit and the error correction circuit applies the error correction code to the transmit data to generate the second data independently of the error introduction circuit, wherein the first data and the second data are generated from a common input without sequential dependency.