IP Library Granted Patent US 12682037
Granted Patent B2
US 12682037 · App. 18/712,226 · Granted Jul 14, 2026

Information processing device and information processing method

Inventors: Kazutaka Tachibana (Kanagawa, JP); Tetsuo Yoshida (Kanagawa, JP); Harunaga Hiwatari (Kanagawa, JP); Haruki Satou (Kanagawa, JP); Akira Noguchi (Kanagawa, JP); Hiroshi Iwasaki (Kanagawa, JP)
Assignee: Sony Semiconductor Solutions Corporation
G06F21/44
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Quick Facts
Patent No.
US 12682037
App. No.
18/712,226
Granted
Jul 14, 2026
Kind
B2
Abstract

An information processing device according to an embodiment of the present disclosure is provided with a memory unit including a stack area, and an information processing unit. The information processing unit executes, after executing a return instruction to a specific address, a determination process configured to determine whether an instruction placed at the specific address is an authentication code verification instruction, and verifies, in a case where the instruction placed at the specific address is consequently determined as the authentication code verification instruction, match or mismatch of an authentication code by executing the authentication code verification instruction.

Claims (51)

1 . An information processing device comprising:

a memory unit including a stack area; and

an information processing unit, wherein

the information processing unit executes, after executing a return instruction to a specific address, a determination process for determining whether an instruction placed at the specific address is an authentication code verification instruction, and verifies, in a case where the instruction placed at the specific address is consequently determined as the authentication code verification instruction, match or mismatch of an authentication code by executing the authentication code verification instruction, and

wherein determining whether the instruction placed at the specific address is an authentication code verification instruction occurs after completion of the return instruction and prior to execution of another instruction at the specific address.

2 . The information processing device according to claim 1 , wherein

the information processing unit executes the return instruction by using the specific address read from the stack area.

3 . The information processing device according to claim 2 , wherein

the information processing unit verifies, in accordance with the authentication code verification instruction, match or mismatch between a first authentication code read from the stack area, and a second authentication code generated from an address of the authentication code verification instruction.

4 . The information processing device according to claim 3 , wherein

the information processing unit executes a mathematical function call instruction, following which the information processing unit executes the return instruction after: executing a store instruction that stores, in the stack area, a return address acquired with the execution of mathematical function call instruction and a third authentication code generated by using the return address; and executing a read instruction that reads data from an address at a place storing the return address in the stack area and data from an address at a place storing the third authentication code in the stack area.

5 . The information processing device according to claim 4 , wherein

the information processing unit executes a determination process configured to determine whether an instruction placed at a start address of the mathematical function is an authentication code generation instruction.

6 . The information processing device according to claim 5 , wherein

the information processing device generates the third authentication code by using the return address, in accordance with the authentication code generation instruction.

7 . An information processing method, in an information processing device provided with a memory unit including a stack area, the information processing method comprising:

executing a return instruction to a specific address;

after executing the return instruction, determining whether an instruction placed at the specific address is an authentication code verification instruction; and

verifying, in a case where the instruction placed at the specific address is consequently determined as the authentication code verification instruction, match or mismatch of an authentication code by executing the authentication code verification instruction,

wherein determining whether the instruction placed at the specific address is an authentication code verification instruction occurs after completion of the return instruction and prior to execution of another instruction at the specific address.

8 . The information processing method according to claim 7 , further comprising:

executing the return instruction by using the specific address read from the stack area.

9 . The information processing method according to claim 8 , further comprising:

verifying, in accordance with the authentication code verification instruction, match or mismatch between a first authentication code read from the stack area, and a second authentication code generated from an address of the authentication code verification instruction.

10 . The information processing method according to claim 9 , further comprising:

executing a mathematical function call instruction; and

executing the return instruction, after

executing a store instruction that stores, in the stack area, a return address acquired with the execution of mathematical function call instruction and a third authentication code generated by using the return address, and

executing a read instruction that reads data from an address at a place storing the return address in the stack area and data from an address at a place storing the third authentication code in the stack area.

11 . The information processing method according to claim 10 , further comprising:

executing a determination process configured to determine whether an instruction placed at a start address of the mathematical function is an authentication code generation instruction.

12 . The information processing method according to claim 11 , further comprising:

generating the third authentication code by using the return address, in accordance with the authentication code generation instruction.

13 . A non-transitory computer readable medium storing a program for information processing in a device provided with a memory unit including a stack area, the program being executable by a processor to perform operations comprising:

executing a return instruction to a specific address;

after executing the return instruction, determining whether an instruction placed at the specific address is an authentication code verification instruction; and

verifying, in a case where the instruction placed at the specific address is consequently determined as the authentication code verification instruction, match or mismatch of an authentication code by executing the authentication code verification instruction,

wherein determining whether the instruction placed at the specific address is an authentication code verification instruction occurs after completion of the return instruction and prior to execution of another instruction at the specific address.

14 . The non-transitory computer readable medium according to claim 13 , further comprising:

executing the return instruction by using the specific address read from the stack area.

15 . The non-transitory computer readable medium according to claim 14 , further comprising:

verifying, in accordance with the authentication code verification instruction, match or mismatch between a first authentication code read from the stack area, and a second authentication code generated from an address of the authentication code verification instruction.

16 . The non-transitory computer readable medium according to claim 15 , further comprising:

executing a mathematical function call instruction; and

executing the return instruction, after

executing a store instruction that stores, in the stack area, a return address acquired with the execution of mathematical function call instruction and a third authentication code generated by using the return address, and

executing a read instruction that reads data from an address at a place storing the return address in the stack area and data from an address at a place storing the third authentication code in the stack area.

17 . The non-transitory computer readable medium according to claim 16 , further comprising:

executing a determination process configured to determine whether an instruction placed at a start address of the mathematical function is an authentication code generation instruction.

18 . The non-transitory computer readable medium according to claim 17 , further comprising:

generating the third authentication code by using the return address, in accordance with the authentication code generation instruction.