IP Library Granted Patent US 12682050
Granted Patent B2
US 12682050 · App. 17/559,520 · Granted Jul 14, 2026

Processor support for software-level containment of row hammer attacks

Inventors: Sudhanva Gurumurthi (Austin, TX); Vilas Sridharan (Jamaica Plain, MA)
Assignee: Advanced Micro Devices, Inc.
G06F21/554G06F21/79G11C11/40611G11C11/40618
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Quick Facts
Patent No.
US 12682050
App. No.
17/559,520
Granted
Jul 14, 2026
Kind
B2
Abstract

A method and apparatus for mitigating row hammer attacks is provided. A row hammer alert is generated by a component of a memory architecture controlling operation of a memory device. The component may be a memory controller, coherency logic, or data fabric. The component obtains a physical address of an aggressor row that caused the alert and obtains an identifier of an execution context corresponding to the physical address. The component generates an error message for a processing device, the error message including the identifier of the execution context. The processing device retrieves the error message when performing a context switch. The processing device then generates an event received by the operating system. The operating system then takes action to reduce row hammer by the execution context, such as ending, restarting, or throttling the execution context.

Claims (13)

1 . A method comprising:

receiving, by a memory component from a storage device, a row hammer notification, the row hammer notification including an address of an aggressor row;

associating, by the memory component, the address with a thread identifier;

creating, by the memory component, an error log entry including the thread identifier;

retrieving, by a processing device, the error log entry upon performing a context switch;

generating, by the processing device, an event in response to the error log entry, the event indicating a recoverable error for the thread identifier;

receiving, by an operating system executing on the processing device, the event; and

in response to the event, altering, by the operating system, operation of a thread associated with the thread identifier.

2 . The method of claim 1 , wherein altering operation of the thread associated with

the thread identifier comprises one or more of:

ending execution of the thread associated with the thread identifier;

restarting a workload performed by the thread associated with the thread identifier; or

reducing resources allocated to the thread associated with the thread identifier, the resources including one or more of processing time or memory commands with respect to the storage device.