IP Library Granted Patent US 12682199
Granted Patent B2
US 12682199 · App. 19/184,008 · Granted Jul 14, 2026

Frame delay time counting circuit and near field communication card including the same

Inventor: Jicheol Kim (Suwon-si, KR)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
G06K19/0723H03K21/00
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12682199
App. No.
19/184,008
Granted
Jul 14, 2026
Kind
B2
Abstract

A near field communication (NFC) card includes a frame delay time (FDT), wherein the FDT counting circuit includes a first comparator configured to compare the envelope voltage signal with a first reference voltage and output a first comparison output signal, a second comparator configured to compare the envelope voltage signal with a second reference voltage and output a second comparison output signal, an FDT compensation circuit configured to output a compensation signal based on the first comparison output signal and the second comparison output signal, and a trigger generation circuit configured to output the trigger signal based on the first comparison output signal and the compensation signal.

Claims (49)

1 . A near field communication (NFC) card comprising:

a rectification and filtering circuit configured to receive a radio signal and generate an envelope voltage signal based on the radio signal, and the envelope voltage signal including a plurality of pause sections; and

a frame delay time (FDT) counting circuit configured to detect a rising section of a last pause section, measure a rising slope of the last pause section and generate a trigger signal which triggers a transmitting operation of the NFC card within a FDT from the rising section of the last pause section,

wherein the FDT counting circuit comprises

a first comparator configured to compare the envelope voltage signal with a first reference voltage and output a first comparison output signal;

a second comparator configured to compare the envelope voltage signal with a second reference voltage and output a second comparison output signal;

an FDT compensation circuit configured to output a compensation signal based on the first comparison output signal and the second comparison output signal; and

a trigger generation circuit configured to output the trigger signal based on the first comparison output signal and the compensation signal.

2 . The NFC card of claim 1 , wherein the trigger generation circuit is configured to

perform an FDT counting operation in response to the first comparison output signal to obtain an FDT count value; and

output the trigger signal when the FDT count value reaches a trigger reference count value, and

wherein the trigger reference count value is compensated based on the compensation signal.

3 . The NFC card of claim 2 , wherein the trigger reference count value is determined by subtracting a compensation count value from a preset reference count value, wherein the compensation count value is a count value determined based on the rising slope of the last pause section.

4 . The NFC card of claim 3 , wherein the compensation count value is determined based on a time interval between a transition time point of the first comparison output signal and a transition time point of the second comparison output signal.

5 . The NFC card of claim 3 , wherein the compensation count value is proportional to a time interval between a transition time point of the first comparison output signal and a transition time point of the second comparison output signal.

6 . The NFC card of claim 3 , wherein the compensation count value corresponds to a count value measured based on a time interval between a transition time point of the first comparison output signal and a transition time point of the second comparison output signal.

7 . The NFC card of claim 3 , wherein the compensation count value is determined by adding a first count value measured based on a time interval between a transition time point of the first comparison output signal and a transition time point of the second comparison output signal to a second count value determined based on the first count value, and the second count value is proportional to the first count value.

8 . A frame delay time (FDT) counting circuit in a near field communication (NFC) card, the FDT counting circuit comprising:

a first comparator configured to compare an envelope voltage signal with a first reference voltage and output a first comparison output signal;

a second comparator configured to compare the envelope voltage signal with a second reference voltage and output a second comparison output signal;

an FDT compensation circuit configured to generate a compensation signal based on the first comparison output signal and the second comparison output signal; and

a trigger generation circuit configured to output a trigger signal based on the first comparison output signal and the compensation signal,

wherein the trigger signal initiates a transmitting operation of the NFC card.

9 . The FDT counting circuit of claim 8 , wherein the trigger generation circuit is configured to

perform an FDT counting operation in response to the first comparison output signal; and

output the trigger signal when an FDT count value reaches a trigger reference count value, and

wherein the trigger reference count value is compensated by the compensation signal.

10 . The FDT counting circuit of claim 9 , wherein the trigger reference count value is compensated by subtracting a compensation count value which is measured based on a rising slope of a pause section of a last data bit in a request data frame received by the NFC card.

11 . The FDT counting circuit of claim 10 , wherein the compensation count value for compensating the trigger reference count value is determined based on a time interval between a transition time point of the first comparison output signal and a transition time point of the second comparison output signal.

12 . The FDT counting circuit of claim 10 , wherein the compensation count value for compensating the trigger reference count value is proportional to a time interval between a transition time point of the first comparison output signal and a transition time point of the second comparison output signal.

13 . The FDT counting circuit of claim 10 , wherein the compensation count value for compensating the trigger reference count value corresponds to a time interval between a transition time point of the first comparison output signal and a transition time point of the second comparison output signal.

14 . The FDT counting circuit of claim 10 , wherein the compensation count value for compensating the trigger reference count value is determined by adding a first count value measured based on a time interval between a transition time point of the first comparison output signal and a transition time point of the second comparison output signal to a second count value determined based on the first count value, and the second count value is proportional to the first count value.

15 . A near field communication (NFC) system comprising an NFC card,

wherein the NFC card comprises:

a rectification and filtering circuit configured to receive a radio signal and generate an envelope voltage signal based on the radio signal, and the envelope voltage signal including a plurality of pause sections; and

a frame delay time (FDT) counting circuit configured to detect a rising section of a last pause section, measure a rising slope of the last pause section, and generate a trigger signal based on the rising slope of the last pause section, and the trigger signal triggering a transmitting operation of the NFC card within a FDT from the rising section of the last pause section,

wherein the FDT counting circuit comprises:

a first comparator configured to compare the envelope voltage signal with a first reference voltage and output a first comparison output signal;

a second comparator configured to compare the envelope voltage signal with a second reference voltage and output a second comparison output signal;

an FDT compensation circuit configured to output a compensation signal based on the first comparison output signal and the second comparison output signal; and

a trigger generation circuit configured to output the trigger signal based on the first comparison output signal and the compensation signal.

16 . The NFC system of claim 15 , wherein the trigger generation circuit is configured to

perform an FDT counting operation in response to the first comparison output signal; and

output the trigger signal when an FDT count value reaches a trigger reference count value, and

wherein the trigger reference count value is compensated based on the compensation signal.

17 . The NFC system of claim 16 , wherein the trigger reference count value is determined by subtracting a compensation count value from a preset count value, the compensation count value is generated based on the rising slope of the last pause section of a last data bit value in a request data frame received by the NFC card.

18 . The NFC system of claim 17 , wherein the compensation count value is determined based on a time interval between a transition time point of the first comparison output signal and a transition time point of the second comparison output signal.

19 . The NFC system of claim 17 , wherein the compensation count value is proportional to a time interval between a transition time point of the first comparison output signal and a transition time point of the second comparison output signal.

20 . The NFC system of claim 17 , wherein the compensation count value comprises a count value corresponding to a time interval between a transition time point of the first comparison output signal and a transition point of the second comparison output signal.