IP Library › Granted Patent US 12682820
Granted Patent B1
US 12682820 · App. 19/019,463 · Granted Jul 14, 2026

Display driving circuit and display driving method

Inventors: Tsung-Lin Chuang (Tainan City, TW); Chuan-Chien Hsu (Tainan City, TW)
Assignee: HIMAX TECHNOLOGIES LIMITED
G09G3/2092G09G2310/08G09G2330/025
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Quick Facts
Patent No.
US 12682820
App. No.
19/019,463
Granted
Jul 14, 2026
Kind
B1
Abstract

A display driving circuit and a display driving method are provided. The display driving circuit includes a controller, a common voltage supply circuit, and a border voltage supply circuit. The controller generates a plurality of border voltage control signals and a plurality of common voltage control signals. The common voltage supply circuit outputs a common voltage to the display panel according to the plurality of common voltage control signals. The border voltage supply circuit outputs a border voltage to the display panel according to the plurality of border voltage control signals. When a voltage polarity of the common voltage is reversed, the common voltage supply circuit performs charge sharing by a common ground voltage.

Claims (63)

1 . A display driving circuit, comprising:

a controller, configured to generate a plurality of border voltage control signals and a plurality of common voltage control signals;

a common voltage supply circuit, coupled to the controller and a display panel, and configured to output a common voltage to the display panel according to the plurality of common voltage control signals; and

a border voltage supply circuit, coupled to the controller and the display panel, and configured to output a border voltage to the display panel according to the plurality of border voltage control signals,

wherein when the common voltage supply circuit determines that a voltage polarity of the common voltage is reversed according to the plurality of common voltage control signals, the common voltage supply circuit performs charge sharing by a common ground voltage during a common voltage polarity reversal process,

wherein the plurality of common voltage control signals comprises a high common voltage level control signal and a low common voltage level control signal, and the common voltage supply circuit comprises:

a first operational amplifier configured to output the common voltage based on a first enable signal, and

a logic circuit configured to generate the first enable signal for the operational amplifier based on the high common voltage level control signal and the low common voltage level control signal,

wherein when the border voltage supply circuit determines that a voltage polarity of the border voltage is reversed according to the plurality of border voltage control signals, the border voltage supply circuit performs charge sharing by a border ground voltage during a border voltage polarity reversal process,

wherein the common voltage supply circuit further comprises:

a first switch circuit, wherein a first terminal of the first switch circuit receives a positive voltage, a control terminal of the first switch circuit receives the high common voltage level control signal;

a second switch circuit, wherein a first terminal of the second switch circuit receives a negative voltage, a control terminal of the second switch circuit receives the low common voltage level control signal;

a first resistor, wherein a first terminal of the first resistor is coupled to a plurality of second terminals of the first switch circuit and the second switch circuit, and a second terminal of the first resistor is coupled to a first node; and

a second resistor, wherein a first terminal of the second resistor receives a first reference voltage, and a second terminal of the second resistor is coupled to the first node;

wherein a first input terminal of the first operational amplifier is coupled to the first node, a control terminal of the first operational amplifier receives the first enable signal, and an output terminal of the first operational amplifier outputs the common voltage.

2 . The display driving circuit according to claim 1 , wherein during the common voltage polarity reversal process, the common voltage supply circuit is configured to change the common voltage from one of a low common voltage level and a high common voltage level to the common ground voltage level, and then change the common voltage from the common ground voltage level to another one of the low common voltage level and the high common voltage level,

wherein the high common voltage level is higher than the common ground voltage level, and the common ground voltage level is higher than the low common voltage level.

3 . The display driving circuit according to claim 1 , wherein during the border voltage polarity reversal process, the border voltage supply circuit is configured to change the border ground voltage from a low border voltage level to the border ground voltage, and then change the border voltage from the border ground voltage to a first high border voltage level or a second high border voltage level,

wherein the first high border voltage level is higher than the second high border voltage level, the second high border voltage level is higher than the border ground voltage, and the border ground voltage is higher than the low border voltage level.

4 . The display driving circuit according to claim 1 , wherein during the border voltage polarity reversal process, the border voltage supply circuit is configured to change the border ground voltage from a first high border voltage level or a second high border voltage level to the border ground voltage, and then change the border voltage from the border ground voltage to a low border voltage level,

wherein the first high border voltage level is higher than the second high border voltage level, the second high border voltage level is higher than the border ground voltage, and the border ground voltage is higher than the low border voltage level.

5 . The display driving circuit according to claim 1 , wherein the logic circuit of the common voltage supply circuit comprises:

a first NOR gate, wherein a first input terminal of the first NOR gate receives the high common voltage level control signal, and a second input terminal of the first NOR gate receives the low common voltage level control signal;

a first inverter, wherein an input terminal of the first inverter is coupled to an output terminal of the first NOR gate, an output terminal of the first inverter is coupled to the control terminal of the first operational amplifier to provide the first enable signal.

6 . The display driving circuit according to claim 1 , wherein the plurality of border voltage control signals comprises a first high border voltage level control signal, a second high border voltage level control signal and a low border voltage level control signal, and the border voltage supply circuit comprises:

a third switch circuit, wherein a first terminal of the third switch circuit receives a first positive voltage, a control terminal of the third switch circuit receives the first high border voltage level control signal;

a fourth switch circuit, wherein a first terminal of the fourth switch circuit receives a second positive voltage, a control terminal of the fourth switch circuit receives the second high border voltage level control signal;

a fifth switch circuit, wherein a first terminal of the fifth switch circuit receives a negative voltage, a control terminal of the fifth switch circuit receives the low border voltage level control signal;

a third resistor, wherein a first terminal of the third resistor is coupled to a plurality of second terminals of the third switch circuit, the fourth switch circuit and the fifth switch circuit, and a second terminal of the third resistor is coupled to a second node;

a fourth resistor, wherein a first terminal of the fourth resistor receives a second reference voltage, and a second terminal of the fourth resistor is coupled to the second node; and

a second operational amplifier, wherein a first input terminal of the second operational amplifier is coupled to the second node, a control terminal of the second operational amplifier receives a second enable signal, and an output terminal of the second operational amplifier outputs the border voltage,

wherein the first positive voltage is higher than the second positive voltage.

7 . The display driving circuit according to claim 6 , wherein the border voltage supply circuit further comprises:

a second NOR gate, wherein a first input terminal of the second NOR gate receives the first high border voltage level control signal, a second input terminal of the second NOR gate receives the second high border voltage level control signal, and a third input terminal of the second NOR gate receives the low common voltage level control signal;

a second inverter, wherein an input terminal of the second inverter is coupled to an output terminal of the second NOR gate, an output terminal of the second inverter is coupled to the control terminal of the second operational amplifier to provide the second enable signal.

8 . The display driving circuit according to claim 1 , wherein the common voltage supply circuit operates the common voltage polarity reversal process during a VCOM and DATA interval period.

9 . The display driving circuit according to claim 1 , wherein the border voltage supply circuit operates the border voltage polarity reversal process during a power switch time period.

10 . The display driving circuit according to claim 1 , wherein the controller is a timing controller.

11 . A display driving method, comprising:

generating a plurality of border voltage control signals and a plurality of common voltage control signals by a controller;

outputting a common voltage to the display panel according to the plurality of common voltage control signals by a common voltage supply circuit;

outputting a border voltage to the display panel according to the plurality of border voltage control signals by a border voltage supply circuit; and

when a voltage polarity of the common voltage is reversed, performing charge sharing by a common ground voltage during a common voltage polarity reversal process, wherein

the plurality of common voltage control signals comprises a high common voltage level control signal and a low common voltage level control signal;

the common voltage is output by a first operational amplifier based on a first enable signal, and

the first enable signal for the operational amplifier is generated by a logic circuit based on the high common voltage level control signal and the low common voltage level control signal,

wherein the display driving method further comprising: when a voltage polarity of the border voltage is reversed, performing charge sharing by a border ground voltage during a border voltage polarity reversal process,

wherein the common voltage supply circuit comprises:

a first switch circuit, wherein a first terminal of the first switch circuit receives a positive voltage, a control terminal of the first switch circuit receives the high common voltage level control signal;

a second switch circuit, wherein a first terminal of the second switch circuit receives a negative voltage, a control terminal of the second switch circuit receives the low common voltage level control signal;

a first resistor, wherein a first terminal of the first resistor is coupled to a plurality of second terminals of the first switch circuit and the second switch circuit, and a second terminal of the first resistor is coupled to a first node; and

a second resistor, wherein a first terminal of the second resistor receives a first reference voltage, and a second terminal of the second resistor is coupled to the first node;

wherein a first input terminal of the first operational amplifier is coupled to the first node, a control terminal of the first operational amplifier receives the first enable signal, and an output terminal of the first operational amplifier outputs the common voltage.

12 . The display driving method according to claim 11 , wherein the step of performing charge sharing by the common ground voltage comprises:

during the common voltage polarity reversal process, changing the common voltage from one of a low common voltage level and a high common voltage level to the common ground voltage level, and then changing the common voltage from the common ground voltage level to another one of the low common voltage level and the high common voltage level by the common voltage supply circuit, wherein the high common voltage level is higher than the common ground voltage level, and the common ground voltage level is higher than the low common voltage level.

13 . The display driving method according to claim 11 , wherein the step of performing charge sharing by the border ground voltage comprises:

during the border voltage polarity reversal process, changing the border ground voltage from a low border voltage level to the border ground voltage, and then change the border voltage from the border ground voltage to a first high border voltage level or a second high border voltage level by the border voltage supply circuit, wherein the first high border voltage level is higher than the second high border voltage level, the second high border voltage level is higher than the border ground voltage, and the border ground voltage is higher than the low border voltage level.

14 . The display driving method according to claim 11 , wherein the step of performing charge sharing by the border ground voltage comprises:

during the border voltage polarity reversal process, changing the border ground voltage from a first high border voltage level or a second high border voltage level to the border ground voltage, and then change the border voltage from the border ground voltage to a low border voltage level by the border voltage supply circuit,

wherein the first high border voltage level is higher than the second high border voltage level, the second high border voltage level is higher than the border ground voltage, and the border ground voltage is higher than the low border voltage level.

15 . The display driving method according to claim 11 , wherein the common voltage supply circuit operates the common voltage polarity reversal process during a charge distribution interval period.

16 . The display driving method according to claim 11 , wherein the border voltage supply circuit operates the border voltage polarity reversal process during a pre-charge start timing period.

17 . The display driving method according to claim 11 , wherein the controller is a timing controller.