Pixel and display device having the same
A pixel for a display device includes a light-emitting element, a first transistor including a first electrode electrically connected to a first node and controlling a driving current, a second transistor electrically connected between a data line and the first node and being turned on in response to a first scan signal supplied through a first scan line, a third transistor electrically connected between the second node and a third node electrically connected to a second electrode of the first transistor and being turned on in response to the first scan signal, and a fourth transistor being turned on in response to a second scan signal supplied through a second scan line, and applying a bias voltage to the first transistor. The fourth transistor is turned on at a first frequency. The second and third transistors are turned on at a second frequency different from the first frequency.
1 . A pixel for a display device, the pixel comprising:
a light-emitting element;
a first transistor including a first electrode electrically connected to a first node, a gate electrode directly connected to a second node, and a second electrode electrically connected to a third node, wherein the first node is electrically connected to a first power source and the third node is electrically connected to the light-emitting element and a first initialization power source;
a second transistor electrically connected between a data line and the first node, the second transistor including a gate electrode electrically connected to a first scan line;
a third transistor electrically connected between the gate electrode of the first transistor and the third node, the third transistor including a gate electrode electrically connected to a third scan line;
a fourth transistor including a gate electrode electrically connected to a second scan line to apply a bias voltage to the first electrode or the second electrode of the first transistor;
a first initialization power source transistor electrically connected between the third node and the first initialization power source; and
a second initialization power source transistor electrically connected between the second node and a second initialization power source, wherein
the fourth transistor is turned on in a first operation period and one or more second operation periods such that the fourth transistor is turned on at a first frequency, and
the second transistor is turned on in the first operation period such that the second transistor is turned on at a second frequency different from the first frequency.
2 . The pixel of claim 1 , wherein the first transistor is configured to control driving current of the light-emitting element based on a voltage of the second node.
3 . The pixel of claim 1 , wherein the third transistor is turned on at the second frequency.
4 . The pixel of claim 3 , wherein a length of a turn-on period of the second transistor and a length of a turn-on period of the third transistor are different from each other.
5 . The pixel of claim 3 , wherein
a first signal is supplied through the first scan line,
a second signal is supplied through the third scan line,
the second transistor is turned on in response to the first signal enabled in a first time period of the first operation period,
the third transistor is turned on in response to the second signal enabled in a second time period of the first operation period, and
the second time period overlaps the first time period.
6 . The pixel of claim 5 , wherein the second time period is greater than the first time period.
7 . The pixel of claim 1 , further comprising:
a fifth transistor electrically connected between the first power source and the first node; and
a sixth transistor electrically connected between the third node and a fourth node, the fourth node electrically connected to a first electrode of the light-emitting element and the first initialization power source transistor.
8 . The pixel of claim 7 , wherein the fifth transistor includes a gate electrode electrically connected to an emission control line.
9 . The pixel of claim 7 , wherein the sixth transistor includes a gate electrode electrically connected to an emission control line.
10 . The pixel of claim 7 , wherein the first initialization power source transistor includes a gate electrode electrically connected to the second scan line.
11 . The pixel of claim 7 , wherein the second initialization power source transistor includes a gate electrode electrically connected to a fourth scan line.
12 . The pixel of claim 7 , wherein a storage capacitor electrically connected between the first power source and the second node.
13 . The pixel of claim 1 , wherein the fourth transistor is electrically connected between an emission control line and the third node, and is configured to apply a voltage of the emission control line, as the bias voltage, to the third node in response to a signal of the second scan line.
14 . The pixel of claim 1 , wherein the fourth transistor is electrically connected between an emission control line and the first node, and is configured to apply a voltage of the emission control line, as the bias voltage, to the first node in response to a signal of the second scan line.
15 . The pixel of claim 1 , wherein the fourth transistor is electrically connected between a bias power source and the third node or between the bias power source and the first node, and is configured to apply a voltage of the bias power source, as the bias voltage, to the third node or the first node in response to a signal of the second scan line.
16 . The pixel of claim 1 , wherein the second frequency is lower than the first frequency.
17 . The pixel of claim 1 , wherein the second frequency is identical to an image refresh rate and corresponds to an aliquot of the first frequency.
18 . The pixel of claim 1 , wherein a length of a turn-on period of the second transistor and a length of a turn-on period of the third transistor are different from each other.
19 . The pixel of claim 1 , wherein
the first initialization power source transistor connected to is configured to generate a first initialization power,
the second initialization power source is configured to generate a second initialization power, and
the first initialization power source is separate from the second initialization power source.
20 . A pixel for a display device, the pixel comprising:
a light-emitting element;
a first transistor including a first electrode electrically connected to a first node, a gate electrode directly connected to a second node, and a second electrode electrically connected to a third node, wherein the first node is electrically connected to a first power source and third node is electrically connected to the light-emitting element;
a second transistor electrically connected between a data line and the first node, the second transistor including a gate electrode electrically connected to a first scan line;
a third transistor electrically connected between the gate electrode of the first transistor and the third node, the third transistor including a gate electrode electrically connected to a third scan line; and
a fourth transistor including a gate electrode electrically connected to a second scan line to apply a bias voltage to the first electrode or the second electrode of the first transistor,
a fifth transistor electrically connected between the first power source and the first node;
a sixth transistor electrically connected between the third node and a fourth node, the fourth node electrically connected to a first electrode of the light-emitting element;
a seventh transistor electrically connected between the fourth node and a first initialization power source; and
an eighth transistor electrically connected between the second node and a second initialization power source, wherein
the fourth transistor is turned on at a first frequency,
the second transistor is turned on at a second frequency different from the first frequency,
the fifth to seventh transistors are turned off at the first frequency, and
the eighth transistor is turned on at the second frequency.