Display device

1 . A display device comprising:

a display panel including a display area in which gate lines, data lines and thin film transistors are arranged, and first and second bezel areas located around the display area;

a gate driving circuit arranged in at least one of the first and second bezel areas and configured to drive the gate lines; and

dummy holes arranged in at least one of the display area and the first and second bezel areas,

wherein each of the gate lines includes a start end connected to the gate driving circuit located in any one of the first and second bezel areas and an end located in the other one of the first and second bezel areas,

wherein a density of the dummy holes differs according to a distance from the end of each gate line, and

wherein the density of the dummy holes is higher as the dummy holes are closer to the end of each gate line, and is lower as the dummy holes are closer to the start end of each gate line.

2 . The display device of claim 1 , further comprising:

dummy electrodes respectively arranged in the dummy holes.

3 . The display device of claim 1 , wherein the gate driving circuit is arranged in the first bezel area, and is connected to the start end of each of the gate lines located in the first bezel area, and

wherein the end of each of the gate lines is arranged in the second bezel area.

4 . The display device of claim 1 , wherein the gate driving circuit includes:

a first gate driving circuit arranged in the first bezel area and connected to the start end of each of the odd-numbered gate lines among the gate lines in the first bezel area; and

a second gate driving circuit arranged in the second bezel area and connected to the start end of each of the even-numbered gate lines among the gate lines in the second bezel area,

wherein the end of each of the odd-numbered gate lines is arranged in the second bezel area, and

wherein the end of each of the even-numbered gate lines is arranged in the first bezel area.

5 . The display device of claim 2 , wherein the dummy holes include at least one of:

a first type dummy hole overlapping the end of each gate line,

a second type dummy hole overlapping each gate line, and

a third type dummy hole overlapping each data line.

6 . The display device of claim 5 , wherein the dummy electrodes include at least one of:

a first dummy electrode arranged in the first type dummy hole;

a second dummy electrode arranged in the second type dummy hole; and

a third dummy electrode arranged in the third type dummy hole.

7 . The display device of claim 6 , wherein each of the first type dummy hole and the second type dummy hole passes through a plurality of insulating layers stacked on each gate line.

8 . The display device of claim 7 , wherein each of the first dummy electrode and the second dummy electrode is arranged on an uppermost insulating layer among the plurality of insulating layers stacked on each gate line and contacts the gate line through each of the first type dummy hole and the second type dummy hole.

9 . The display device of claim 5 , wherein the third type dummy hole passes through a plurality of insulating layers stacked on each data line.

10 . The display device of claim 7 , wherein the third dummy electrode is arranged on an uppermost insulating layer among the plurality of insulating layers stacked on each data line and contacts the data line through the third type dummy hole.

11 . The display device of claim 6 , wherein the dummy electrodes are arranged as a same transparent conductive layer on a same layer as a pixel electrode connected to the thin film transistor.

12 . The display device of claim 11 , wherein the dummy holes further include fourth type dummy holes arranged between the end of each gate line and the gate driving circuit in at least one of the first bezel area and the second bezel area.

13 . The display device of claim 12 , wherein the dummy electrodes further include:

a fourth dummy electrode arranged in the fourth type dummy hole; and

at least one fifth dummy electrode arranged below the fourth type dummy hole.

14 . The display device of claim 13 , wherein the fourth type dummy hole passes through a plurality of insulating layers stacked on the at least one fifth dummy electrode, and

wherein the fourth dummy electrode is arranged on an uppermost insulating layer among the plurality of insulating layers and contacts the at least one fifth dummy electrode through the fourth type dummy hole.

15 . The display device of claim 13 , wherein the fourth dummy electrode is arranged as a same transparent conductive layer on a same layer as the pixel electrode connected to the thin film transistor, and

wherein the at least one fifth dummy electrode is arranged as a same metal layer on a same layer as at least one electrode of the thin film transistor.

16 . The display device of claim 15 , wherein the thin film transistor includes:

a light shield electrode arranged on a substrate;

an active layer overlapping the light shield electrode and a buffer layer between the light shield electrode and the active layer;

a gate electrode arranged between the active layer and a gate insulating layer; and

first and second source-drain electrodes respectively connected to first and second connection areas of the active layer through first and second contact holes in an interlayer insulating layer covering the gate insulating layer and the gate electrode, and

wherein the at least one fifth dummy electrode includes at least one of a light shield metal layer which is a same as the light shield electrode, a gate metal layer which is a same as the gate electrode, and a source-drain metal layer which is a same as the first and second source-drain electrodes.

17 . The display device of claim 16 , wherein the at least one fifth dummy electrode includes a hydrogen capture metal material included in at least one of the light shield metal layer, the gate metal layer, and the source-drain metal layer.

18 . The display device of claim 16 , wherein the thin film transistor includes:

a light shield electrode arranged on the substrate;

an active layer overlapping the light shield electrode and a buffer layer between the light shield electrode and the active layer;

a gate electrode arranged between the active layer and a gate insulating layer; and

first and second source-drain electrodes respectively connected to first and second connection areas of the active layer through first and second contact holes in the gate insulating layer, and

wherein the at least one fifth dummy electrode includes at least one of a light shield metal layer which is a same as the light shield electrode, a gate metal layer which is a same as the gate electrode, and a source-drain metal layer which is a same as the first and second source-drain electrodes.

19 . The display device of claim 17 , wherein the at least one fifth dummy electrode includes a hydrogen capture metal material included in at least one of the light shield metal layer, the gate metal layer, and the source-drain metal layer.

20 . The display device of claim 11 , further comprising at least one of:

first passivation holes provided in an upper passivation layer in the display area; and

second passivation holes provided in the upper passivation layer located between the end of each gate line and the gate driving circuit in at least one of the first bezel area or the second bezel area.

21 . The display device of claim 20 , further comprising at least one of:

sixth dummy electrodes respectively arranged in the first passivation holes; and

seventh dummy electrodes respectively arranged in the second passivation holes.

22 . The display device of claim 20 , wherein the first passivation holes overlap or are adjacent to at least one of the gate line, the data line, and the thin film transistor.

23 . The display device of claim 21 , further comprising at least one of:

an eighth dummy electrode arranged below the first passivation hole, and contacting the sixth dummy electrode through the first passivation hole; and

a ninth dummy electrode arranged below the second passivation hole, and contacting the seventh dummy electrode through the second passivation hole.

24 . The display device of claim 23 , wherein at least one of the sixth dummy electrode or the seventh dummy electrode is arranged as a same transparent conductive layer on a same layer as the pixel electrode connected to the thin film transistor, and

wherein at least one of the eighth dummy electrode or the ninth dummy electrode is arranged as a same transparent conductive layer on a same layer as a common electrode overlapped between the pixel electrode and the upper passivation layer.

25 . A display device comprising:

a display panel including a display area having gate lines, data lines and thin film transistors, and a bezel area surrounding the display area;

a gate driving circuit arranged in the bezel area and configured to drive the gate lines connected to the gate driving circuit and extending across the display area and ending in the bezel area; and

first dummy holes arranged in the display area and configured to provide a hydrogen degasification path; and

second dummy holes arranged in the bezel area and configured to provide another hydrogen degasification path,

wherein a density of the second dummy holes in the bezel area is greater than a density of the first dummy holes in in the display area, and

wherein the density of the first dummy holes is lower closer to the gate driving circuit in the bezel area and higher closer to the ending of the gate line in the bezel area.

26 . The display device of claim 25 , wherein the density of the first and second dummy holes are controlled to minimize a variation of voltage thresholds of transistors included in the display area and the bezel area.

27 . The display device of claim 25 , wherein the bezel area includes a first bezel area on a first side of the display panel and a second bezel area on a second side of the display panel.

28 . The display device of claim 27 , wherein the gate driving circuit is arranged on the first bezel area and the gate lines extend across the display area and ending in the second bezel area.

29 . The display device of claim 27 , wherein the gate driving circuit includes:

a first gate driving circuit arranged in the first bezel area and connected to a start end of each of odd-numbered gate lines among the gate lines in the first bezel area; and

a second gate driving circuit arranged in the second bezel area and connected to a start end of each of even-numbered gate lines among the gate lines in the second bezel area,

wherein the end of each of the odd-numbered gate lines is arranged in the second bezel area, and

wherein the end of each of the even-numbered gate lines is arranged in the first bezel area.