IP Library Granted Patent US 12682967
Granted Patent B2
US 12682967 · App. 18/733,182 · Granted Jul 14, 2026

Operating method of memory device

Inventors: Jung Shik Jang (Icheon-si Gyeonggi-do, KR); Won Geun Choi (Icheon-si Gyeonggi-do, KR); In Su Park (Icheon-si Gyeonggi-do, KR); Woo Pyo Jeong (Icheon-si Gyeonggi-do, KR); Jung Dal Choi (Icheon-si Gyeonggi-do, KR)
Assignee: SK hynix Inc.
G11C16/3459G11C16/0483G11C16/102G11C16/26
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Quick Facts
Patent No.
US 12682967
App. No.
18/733,182
Granted
Jul 14, 2026
Kind
B2
Abstract

The present disclosure relates to method of operating a memory device that includes programming program data by distributing the program data to a first memory cell group corresponding to a first drain select line and a second memory cell group corresponding to a second drain select line during a program operation of a selected memory block, reading memory cells included in each of the first memory cell group and the second memory cell group during a read operation of the selected memory block, and determining threshold voltages for the first memory cell group according to a read result for the first memory cell group and threshold voltages for the second memory cell group according to a read result for the second memory cell group and outputting data codes corresponding to combinations of the threshold voltages during a read operation of the selected memory block.

Claims (32)

1 . A method of operating a memory device, the method comprising:

programming program data by distributing the program data to a first memory cell group corresponding to a first drain select line and a second memory cell group corresponding to a second drain select line during a program operation of a selected memory block;

reading memory cells included in each of the first memory cell group and the second memory cell group during a read operation of the selected memory block; and

determining threshold voltages for the first memory cell group according to a read result for the first memory cell group and threshold voltages for the second memory cell group according to a read result for the second memory cell group and outputting data codes corresponding to combinations of the threshold voltages during a read operation of the selected memory block.

2 . The method of claim 1 , wherein the program operation is performed by storing data in each of the memory cells, where a quantity of bits of the data is other than 2 raised to an Nth power, where N is a number of bits in each of the data codes.

3 . The method of claim 1 , wherein reading the memory cells included in each of the first memory cell group and the second memory cell group comprises:

reading the memory cells included in the first memory cell group corresponding to the first drain select line; and

reading the memory cells included in the second memory cell group corresponding to the second drain select line.

4 . The method of claim 1 , wherein during reading of the memory cells included in the first memory cell group, the threshold voltages of the memory cells included in the first memory cell group are determined, and

wherein during reading of the memory cells included in the second memory cell group, the threshold voltages of the memory cells included in the second memory cell group are determined.

5 . The method of claim 1 , wherein the data codes include different codes corresponding to the threshold voltages determined according to the read result for the first memory cell group and the threshold voltages determined according to the read result for the second memory cell group.

6 . The method of claim 1 , wherein the data codes include at least five bits of data.

7 . The method of claim 1 , wherein a code corresponding to a combination with a largest voltage difference between the threshold voltages of the first memory cell group and the threshold voltages of the second memory cell group is excluded from the data codes.

8 . The method of claim 7 , wherein a code corresponding to a combination with a second largest voltage difference between the threshold voltages of the first memory cell group and the threshold voltages of the second memory cell group is excluded from the data codes.

9 . A method of operating a memory device, the method comprising:

programming M bits of data into memory cells selected by select lines, where M is a real number;

reading the memory cells according to each of the select lines; and

outputting data codes by combining read results of the memory cells corresponding to each of the select lines,

wherein each of the data codes comprises N bits, and N is greater than M.

10 . The method of claim 9 , wherein the memory cells are programmed with fewer threshold voltage distributions than two raised to an Nth power.

11 . The method of claim 9 , wherein M corresponds to N/k and k is a quantity of the select lines.

12 . The method of claim 9 , wherein a quantity of data codes is two raised to the Nth power.

13 . The method of claim 9 , wherein a code corresponding to a largest voltage difference between threshold voltages of the memory cells corresponding to different select lines is excluded from the data codes.

14 . The method of claim 13 , wherein codes corresponding to voltage differences smaller than the largest voltage difference between the threshold voltages of the memory cells are excluded from the data codes.

15 . A method of operating a memory device, the method comprising:

identifying first threshold voltages corresponding to a first memory cell group and second threshold voltages corresponding to a second memory cell group;

generating first data codes by combining threshold voltages, among the first and second threshold voltages, included between a minimum threshold voltage and a reference threshold voltage;

generating second data codes by combining threshold voltages, among the first and second threshold voltages, included between a threshold voltage greater than the reference threshold voltage and a maximum threshold voltage;

excluding codes for inactive combinations of threshold voltages, which inactive combinations have voltage differences greater than a reference voltage from the second data codes;

determining read voltages according to a quantity of bits stored in each of memory cells included in the first memory cell group and the second memory cell group and performing a first read operation on the first memory cell group and a second read operation on the second memory cell group by using the read voltages; and

outputting a selected data code among the first data codes and the second data codes by combining read results from the first read operation and the second read operation.

16 . The method of claim 15 , wherein the codes of the inactive combinations are not included in the first data codes.