Self-repair memory techniques
Various implementations described herein are directed to a method that tests and repairs memory fabricated on a wafer or a package. The method may generate and store a reuse table based on memory repair results. The method may manufacture the memory after repairing the memory. The method may access and reuse data stored in the reuse table to repair the memory after manufacturing the memory.
1 . A method, comprising:
performing an initial testing and repair of memory fabricated on a wafer or a package, comprising:
testing the memory, comprising identifying one or more errors in the memory, wherein a first subset of the one or more errors is associated with one or more first memory locations of the memory, and wherein a second subset of the one or more errors is associated with one or more second memory locations of the memory; and
repairing the memory based on the one or more errors, comprising repairing the first subset of the one or more errors associated with the one or more first memory locations;
generating and storing a reuse table based on memory repair results corresponding to the initial testing and repair, comprising storing the reuse table in a second memory formed on the wafer or the package on which the memory is fabricated, wherein data stored in the reuse table comprises:
data indicating that the one or more first memory locations have been repaired; and
data indicating that the one or more second memory locations have not been repaired;
manufacturing the memory after performing the initial testing and repair; and
performing a post-production testing and repair of the memory after manufacturing the memory, comprising:
accessing the data stored in the reuse table after manufacturing the memory; and
repairing the memory based on the accessed data stored in the reuse table, comprising repairing the second subset of the one or more errors associated with the one or more second memory locations.
2 . The method of claim 1 , wherein:
the data stored in the reuse table corresponds to the memory repair results; and
the data indicating that the one or more second memory locations have not been repaired includes data corresponding to one or more addresses that point to the one or more second memory locations.
3 . The method of claim 1 , wherein generating and storing the reuse table comprises:
storing the reuse table in fuse memory formed on the wafer or the package; or
storing the reuse table in registers as part of a non-volatile memory that is different than the memory.
4 . The method of claim 1 , wherein accessing the data stored in the reuse table comprises accessing and reusing the data stored in the reuse table to repair the memory after the memory is put into service.
5 . The method of claim 1 , wherein repairing the second subset of the one or more errors comprises:
self-repairing the memory during idle cycles of post-production operation after manufacturing the memory by reusing a reuse table entry in the reuse table, wherein the reuse table entry corresponds to a respective second memory location; and
after self-repairing the memory by reusing the reuse table entry in the reuse table, marking the reuse table entry as invalid such that a different reuse table entry in the reuse table is used for a subsequent repair.
6 . The method of claim 5 , wherein marking the reuse table entry as invalid comprises updating the availability status of the reuse table entry from available to not available.
7 . The method of claim 1 , wherein:
the memory comprises cache memory that is configured to operate as self-repair cache memory; and
performing the initial testing and repair of the memory further comprises performing the initial testing and repair using memory built-in self-testing (MBIST).
8 . The method of claim 1 , wherein the data indicating that the one or more second memory locations have not been repaired comprises availability status data indicating that the one or more second memory locations are available for use in repairing the memory after manufacturing.
9 . The method of claim 1 , wherein repairing the memory based on the accessed data stored in the reuse table comprises selecting, prior to repairing the memory after manufacturing, at least one of the one or more second memory locations based on the data indicating that the one or more second memory locations have not been repaired.
10 . A device, comprising:
a test-repair module configured to:
perform an initial testing and repair of memory fabricated on a wafer or a package, comprising:
test the memory, comprising identify one or more errors in the memory, wherein a first subset of the one or more errors is associated with one or more first memory locations of the memory, and wherein a second subset of the one or more errors is associated with one or more second memory locations of the memory; and
repair the memory based on the one or more errors, comprising repair the first subset of the one or more errors associated with the one or more first memory locations; and
generate and store a reuse table based on memory repair results corresponding to the initial testing and repair, comprising store the reuse table in a second memory formed on the wafer or the package on which the memory is fabricated, wherein data stored in the reuse table comprises:
data indicating that the one or more first memory locations have been repaired; and
data indicating that the one or more second memory locations have not been repaired;
a processor configured to interface with the memory after the test-repair module performs the initial testing and repair and after manufacturing of the memory; and
a self-repair module configured to:
perform post-production testing and repair of the memory after the manufacturing of the memory, comprising:
access the data stored in the reuse table after manufacturing the memory; and
repair the memory based on the accessed data stored in the reuse table, comprising repair the second subset of the one or more errors associated with the one or more second memory locations.
11 . The device of claim 10 , wherein:
the data stored in the reuse table corresponds to the memory repair results; and
the data indicating that the one or more second memory locations have not been repaired includes data corresponding to one or more addresses that point to the one or more second memory locations.
12 . The device of claim 10 , wherein generate and store the reuse table comprises:
store the reuse table in fuse memory formed on the wafer or the package; or
store the reuse table in registers as part of a non-volatile memory that is different than the memory.
13 . The device of claim 10 , wherein
access the data stored in the reuse table comprises access and reuse the data stored in the reuse table so as to repair the memory after using the memory for a predetermined period of time.
14 . The device of claim 10 , wherein repair the second subset of the one or more errors comprises:
self-repair the memory during idle cycles of post-production operation after the manufacturing of the memory by reusing a reuse table entry in the reuse table, wherein the reuse table entry corresponds to a respective second memory location.
15 . The device of claim 10 , wherein:
the memory comprises a cache memory that is configured to operate as self-repair cache memory; and
perform the initial testing and repair of the memory further comprises perform the initial testing and repair using memory built-in self-testing (MBIST).
16 . A method, comprising:
detecting a memory failure in memory after manufacturing the memory; and
performing a post-production testing and repair of the memory after detecting the memory failure, comprising:
testing the memory, comprising identifying one or more errors associated with one or more memory locations of the memory after detecting the memory failure;
repairing the memory based on the one or more errors, comprising repairing at least a first subset of the one or more errors associated with at least a first subset of the one or more memory locations; and
accessing data stored in a reuse table corresponding to memory repair results after manufacturing the memory, wherein the reuse table is stored in a second memory formed on a wafer or a package on which the memory is fabricated, and wherein accessing the data comprises:
updating the data stored in the reuse table to include data corresponding to one or more addresses that point to the one or more memory locations; and
updating the data stored in the reuse table to indicate that at least the first subset of the one or more memory locations has been repaired.
17 . The method of claim 16 , wherein performing the post-production testing and repair further comprises generating and storing the reuse table based on the detected memory failure.
18 . The method of claim 17 , wherein generating and storing the reuse table comprises storing the reuse table in the second memory, wherein the second memory comprises:
fuse memory; or
a non-volatile memory that is different than the memory.
19 . The method of claim 16 , wherein repairing the memory further comprises repairing the memory after manufacturing the memory.
20 . The method of claim 16 , wherein repairing the memory further comprises repairing the memory after the memory is put into service.