Phased array antenna

1 . A phased array antenna comprising:

a printed circuit board including a plurality of first terminals; and

a thin-film transistor (TFT) substrate including a plurality of second terminals and a plurality of third terminals, the TFT substrate being arranged relative to the printed circuit board in such a manner that the plurality of first terminals and the plurality of second terminals face, respectively, and are electrically connected,

wherein the printed circuit board includes:

a first substrate;

a plurality of transmission and reception electrodes arranged one-dimensionally or two-dimensionally on the first substrate; and

a plurality of beamforming integrated circuits (ICs) that are arranged on the first substrate and are connected with the plurality of first terminals and the plurality of transmission and reception electrodes, and

the TFT substrate includes:

a second substrate;

a plurality of control circuits that are formed on the second substrate and are connected to the plurality of second terminals and the plurality of third terminals, each control circuit including at least one TFT and generating a control signal that controls one of the plurality of beamforming ICs;

a flattening multilayer arranged on the second substrate in such a manner that the flattening multilayer covers the plurality of control circuits and exposes the plurality of third terminals; and

a plurality of recessed portions provided in the flattening multilayer, each recessed portion having an opening in a top face of the flattening multilayer.

2 . The phased array antenna according to claim 1 ,

wherein, in plan view, each of the plurality of recessed portions overlaps one of the plurality of transmission and reception electrodes on the printed circuit board.

3 . The phased array antenna according to claim 1 ,

wherein each of the plurality of recessed portions has a side face, and a terrace provided on the side face.

4 . The phased array antenna according to claim 1 ,

wherein the flattening multilayer includes:

a first flattening layer located on the second substrate, covering the plurality of control circuits; and

a second flattening layer that is located on the first flattening layer and includes a plurality of second through holes,

wherein each recessed portion is located in one of the plurality of second through holes.

5 . The phased array antenna according to claim 4 ,

wherein the first flattening layer includes a plurality of first through holes, and

each of the recessed portions is located in one of the plurality of first through holes.

6 . The phased array antenna according to claim 4 ,

wherein each of the recessed portions is located on the first flattening layer.

7 . The phased array antenna according to claim 5 ,

wherein the flattening multilayer further includes a third flattening layer that is located on the second flattening layer, covering the second side face, and has a third side face,

the first flattening layer has first side faces facing the first through holes, respectively, and first terraces located on the first side faces, respectively,

the second flattening layer has second side faces facing the second through holes, respectively, and second terraces located on the second side faces, respectively,

the second side faces of the second flattening layer cover the first side faces of the first side faces of the first flattening layer, respectively, and

the side faces of the recessed portions cover the second side faces, respectively.

8 . The phased array antenna according to claim 6 ,

wherein the flattening multilayer further includes a third flattening layer that is located on the second flattening layer,

the second flattening layer has second side faces facing the second through holes, respectively, and second terraces located on the second side faces, respectively, and

the side faces of the recessed portions cover the second side faces, respectively.

9 . The phased array antenna according to claim 7 ,

wherein the flattening multilayer further includes a wiring layer that is located between the second flattening layer and the third flattening layer, or between the first flattening layer and the second flattening layer, and

the wiring layer is connected to the plurality of control circuits and the second terminals.

10 . The phased array antenna according to claim 8 ,

wherein the flattening multilayer further includes a wiring layer that is located between the second flattening layer and the third flattening layer, or between the first flattening layer and the second flattening layer, and

the wiring layer is connected to the plurality of control circuits and the second terminals.

11 . The phased array antenna according to claim 9 ,

wherein the wiring layer is located around the recessed portions.

12 . The phased array antenna according to claim 9 ,

wherein at least one of the first flattening layer, the second flattening layer, and the third flattening layer has a maximum thickness of 2 μm or more.

13 . The phased array antenna according to claim 9 ,

wherein the first flattening layer, the second flattening layer, and the third flattening layer are made of an organic material.

14 . The phased array antenna according to claim 9 ,

wherein at least one of the first flattening layer, the second flattening layer, and the third flattening layer is made of polyimide resin.

15 . The phased array antenna according to claim 1 ,

wherein no conductor is located in the recessed portions.