Negative transient voltage suppression in a wireless communication device
Circuits and methods for suppression of negative transient voltage may be implemented in systems that combine high-speed data, audio, and charging at a plug. The circuits and methods for suppression of the negative transient voltage may include a first diode and transistor coupled in series between a pin and ground, where the transistor is controlled by an output of a voltage comparator that is also coupled to the first pin. A negative transient voltage event may cause the comparator to activate the transistor to sink a current through the diode.
1 . A wireless communication device comprising:
an application processor;
an audio signal amplifier;
a charging integrated circuit, wherein the application processor, the audio signal amplifier, and the charging integrated circuit are coupled to a set of wires by multiplexing circuitry;
a first pin on a first wire of the set of wires;
a data and charging plug coupled to the set of wires through the first pin;
a first voltage comparator having a first inverting input coupled to the first pin, wherein a first non-inverting input of the first voltage comparator is coupled to a reference voltage; and
a first diode and a transistor coupled in series between the first pin and ground, wherein a gate of the transistor is coupled to an output of the first voltage comparator.
2 . The wireless communication device of claim 1 , further comprising:
a second diode coupled to a second pin on a second wire of the set of wires, wherein the second diode is coupled to a drain of the transistor, and wherein the first diode is coupled to the drain of the transistor.
3 . The wireless communication device of claim 2 , further comprising:
a second voltage comparator having a second inverting input coupled to the second pin and a second non-inverting input coupled to the reference voltage; and
a logic gate coupled to the output of the first voltage comparator and to an output of the second voltage comparator, wherein an output of the logic gate is coupled to the gate of the transistor.
4 . The wireless communication device of claim 3 , wherein the logic gate comprises an OR gate.
5 . The wireless communication device of claim 1 , wherein the first diode comprises a positive-negative (p-n) junction diode.
6 . The wireless communication device of claim 1 , wherein the transistor comprises a n-type metal oxide semiconductor (NMOS) transistor.
7 . The wireless communication device of claim 1 , wherein the data and charging plug comprises a universal serial bus (USB) plug.
8 . The wireless communication device of claim 7 , further comprising:
a codec chip that includes the set of wires, the audio signal amplifier, the first pin, and the multiplexing circuitry.
9 . The wireless communication device of claim 1 , further comprising:
a level shifting circuit coupled between the first pin and the first inverting input, wherein the level shifting circuit is configured to add a positive direct current (DC) offset to a voltage level of the first pin.
10 . The wireless communication device of claim 1 , wherein a cathode of the first diode is coupled to the first pin, and wherein an anode of the first diode is coupled to a drain of the transistor, further wherein a source of the transistor is coupled to ground.
11 . A wireless communication device comprising:
an application processor;
an audio signal amplifier;
a charging integrated circuit;
means for multiplexing the application processor, the audio signal amplifier, and the charging integrated circuit on a set of wires;
a first pin on a first wire of the set of wires;
a data and charging plug coupled to the set of wires through the first pin; and
means for canceling a negative surge at the first pin, wherein the means for canceling includes a first diode and shunt transistor coupled in series between ground and the first pin.
12 . The wireless communication device of claim 11 , wherein the means for canceling further comprises:
a feedback loop coupling the first pin to an input of a first comparator and coupling an output of the first comparator to a gate of the shunt transistor.
13 . The wireless communication device of claim 12 , wherein the means for canceling further comprises:
a second diode coupled to a second pin on the set of wires, wherein the second diode is coupled to a drain of the shunt transistor, and wherein the first diode is coupled to the drain of the shunt transistor.
14 . The wireless communication device of claim 13 , wherein the means for canceling further comprises:
a second comparator coupled to the second pin; and
a logic gate coupled to the output of the first comparator and to an output of the second comparator, wherein an output of the logic gate is coupled to the gate of the shunt transistor.
15 . The wireless communication device of claim 14 , wherein the logic gate comprises an OR gate.
16 . The wireless communication device of claim 11 , wherein the shunt transistor comprises a metal oxide semiconductor field effect transistor (MOSFET), and wherein the first diode comprises a positive-negative (p-n) junction device.