Ripple reduction for direct current-to-direct current (DC-DC) converters
Systems and methods for ripple reduction for direct current-to-direct current (DC-DC) converters are disclosed. In one aspect, ripple is reduced by measuring a load current proxy and providing a fast-acting feedback loop to the DC-DC converter to adjust current levels to a desired level. In particular, a change in voltage at and output may be measured, and its derivative (dV/dt) calculated and multiplied by a capacitance to determine the load current. In a second aspect, two DC-DC converters are used, where low-frequency current changes are handled by a first DC-DC converter, mid-frequency current changes are handled by the second DC-DC converter, and fast-frequency current changes are handled by the capacitor associated with the capacitance of the first aspect.
1 . A power management circuit comprising:
a direct current-to-direct current (DC-DC) converter configured to provide an output control signal to a load at an output node through at least an inductor;
a capacitor having a capacitance C, the capacitor coupling the output node to ground;
a first current sensor associated with the inductor, configured to provide a first current feedback signal;
a voltage sensor associated with the output node, configured to provide a voltage feedback signal;
a second current sensor associated with the capacitor, configured to provide a second current feedback signal; and
a comparator that compares a combined feedback signal based on the first current feedback signal, the voltage feedback signal, and the second current feedback signal to a reference voltage to control the DC-DC converter;
wherein the first current feedback signal and the voltage feedback signal are initially combined by a first adder circuit before the second current feedback signal is combined by a second adder circuit to form the combined feedback signal.
2 . The power management circuit of claim 1 , wherein the second current sensor measures a change in voltage relative to time (dV/dt) and uses C of the capacitor to determine current.
3 . The power management circuit of claim 1 , wherein the first current sensor comprises an integrator having a feedback resistor and a feedback capacitor that integrates a sensed voltage across the inductor.
4 . The power management circuit of claim 1 , further comprising an input configured to receive a signal input.
5 . The power management circuit of claim 4 , wherein the signal input comprises an envelope tracking signal input.
6 . The power management circuit of claim 4 , wherein the signal input comprises an average power signal input.
7 . The power management circuit of claim 1 , further a second DC-DC converter with a second inductor, wherein the DC-DC converter and the second DC-DC converter are collectively configured to provide the output control signal at the output node.
8 . The power management circuit of claim 7 , further comprising a DC blocking capacitor positioned between the second DC-DC converter and the second inductor.
9 . The power management circuit of claim 1 integrated into a device selected from the group consisting of: a set-top box; an entertainment unit; a navigation device; a communications device; a fixed location data unit; a mobile location data unit; a global positioning system (GPS) device; a mobile phone; a cellular phone; a smartphone; a session initiation protocol (SIP) phone; a tablet; a phablet; a server; a computer; a portable computer; a mobile computing device; a wearable computing device; a desktop computer; a personal digital assistant (PDA); a monitor; a computer monitor; a television; a tuner; a radio; a satellite radio; a music player; a digital music player; a portable music player; a digital video player; a video player; a digital video disc (DVD) player; a portable digital video player; an automobile; a vehicle component; avionics systems; a drone; and a multicopter.
10 . The power management circuit of claim 1 integrated into a communication device comprising:
a baseband processor;
a transceiver circuit coupled to the baseband processor; and
a front-end module (FEM) comprising the power management circuit.
11 . A method of operating a power management circuit, comprising:
sensing a first current across an inductor associated with a direct current-to-direct current (DC-DC) converter with a first current sensor;
sensing a second current by sensing a change in voltage for a capacitor at an output node of the DC-DC converter;
sensing voltage at the output node to provide a voltage feedback signal;
combining the voltage feedback signal with the first current to form a combination signal;
subsequently combining the combination signal with the second current to from a combined feedback signal;
comparing the combined feedback signal to a reference voltage with a comparator; and
adjusting the DC-DC converter based on the comparing.
12 . The method of claim 11 , further comprising providing part of an output control signal using the DC-DC converter and providing a second part of the output control signal using a second DC-DC converter.
13 . A power management circuit comprising:
an output node;
a first direct current-to-direct current (DC-DC) converter coupled to the output node through a first inductor, the first DC-DC converter, configured to provide low frequencies using a basic clock frequency to an output control signal at the output node; and
a second DC-DC converter coupled to the output node through a second inductor and a DC blocking capacitor, the second DC-DC converter configured to provide higher frequencies using an integer multiple of the basic clock frequency to the output control signal.
14 . The power management circuit of claim 13 , further comprising a second capacitor coupling the output node to ground.
15 . The power management circuit of claim 14 , further comprising a current sensor configured to sense a change in voltage for the second capacitor and derive a sensed current signal therefrom, wherein the sensed current signal is used by a current feedback loop to adjust operation of at least the first DC-DC converter.
16 . The power management circuit of claim 13 , further comprising a voltage feedback loop configured to change operation of at least the first DC-DC converter.
17 . The power management circuit of claim 16 , further comprising a current feedback loop configured to change operation of at least the first DC-DC converter.
18 . A method of controlling a power management circuit, comprising:
outputting a low-frequency signal using a first direct current-to-direct current (DC-DC) converter based on a basic clock frequency;
outputting a medium-frequency signal based on an integer multiple of the basic clock frequency using a second DC-DC converter while blocking low-frequency signals from the second DC-DC converter; and
adjusting output from at least the first DC-DC converter using a current feedback loop and a voltage feedback loop.