IP Library Granted Patent US 12683550
Granted Patent B2
US 12683550 · App. 18/946,419 · Granted Jul 14, 2026

Methods and apparatus to track an oscillator frequency with digital filters

Inventors: Anurag Choudhury (Bengaluru, IN); Robin Hoel (Oslo, NO); Torjus Lyng Kallerud (Oslo, NO); Ashutosh Mishra (Bangalore, IN)
Assignee: TEXAS INSTRUMENTS INCORPORATED
H03B5/04H03B2200/0054H03B2202/02
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Quick Facts
Patent No.
US 12683550
App. No.
18/946,419
Filed
Nov 13, 2024
Granted
Jul 14, 2026
Kind
B2
Art Unit
2836
USPC
331/175
Abstract

An example apparatus includes: first oscillator circuitry; second oscillator circuitry; period calculator circuitry coupled to the first oscillator circuitry and coupled to the second oscillator circuitry; averaging circuitry coupled to the period calculator circuitry; and coefficient filter circuitry coupled to the averaging circuitry.

Claims (68)

1 . An apparatus comprising:

first oscillator circuitry;

second oscillator circuitry;

period calculator circuitry coupled to the first oscillator circuitry and coupled to the second oscillator circuitry;

averaging circuitry coupled to the period calculator circuitry;

coefficient filter circuitry coupled to the averaging circuitry; and

multiplexer circuitry including a first input coupled to the period calculator circuitry, a second input coupled to the averaging circuitry, and an output coupled to the coefficient filter circuitry.

2 . The apparatus of claim 1 , wherein the averaging circuitry includes an input coupled to the period calculator circuitry and coupled to the first input of the multiplexer circuitry.

3 . The apparatus of claim 1 , further comprising noise detection circuitry including:

a first input coupled to the averaging circuitry;

a second input coupled to the coefficient filter circuitry; and

an output coupled to the second input of the coefficient filter circuitry.

4 . The apparatus of claim 3 , wherein the noise detection circuitry includes:

detection threshold circuitry;

combination circuitry coupled to the averaging circuitry and coupled to the coefficient filter circuitry; and

comparator circuitry coupled to the detection threshold circuitry, coupled to the combination circuitry, coupled to the averaging circuitry, and coupled to the coefficient filter circuitry.

5 . The apparatus of claim 4 ,

wherein the combination circuitry is configurable to generate an error value based on a difference between a first value received from the averaging circuitry and a second value received from the coefficient filter circuitry, and

wherein the comparator circuitry is configurable to:

receive a threshold value from the detection threshold circuitry; and

compare the error value to the threshold value.

6 . The apparatus of claim 1 , wherein the period calculator circuitry is configurable to generate a value based on a ratio of:

a frequency of the first oscillator circuitry; and

a frequency of the second oscillator circuitry.

7 . The apparatus of claim 1 , further comprising real-time clock (RTC) accumulator circuitry coupled to the first oscillator circuitry and coupled to the coefficient filter circuitry.

8 . The apparatus of claim 7 , further comprising:

programmable circuitry coupled to the RTC accumulator circuitry; and

interface circuitry coupled to the programmable circuitry.

9 . The apparatus of claim 1 , further comprising:

coefficient circuitry coupled to the coefficient filter circuitry; and

programmable circuitry coupled to the period calculator circuitry, coupled to the averaging circuitry, and coupled to the coefficient circuitry.

10 . An apparatus comprising:

period calculator circuitry including an output;

averaging circuitry including an output and coupled to the output of the period calculator circuitry;

noise detection circuitry coupled to the output of the averaging circuitry; and

coefficient filter circuitry including an output coupled to the noise detection circuitry.

11 . The apparatus of claim 10 , wherein the coefficient filter circuitry is coupled to the output of the averaging circuitry.

12 . The apparatus of claim 10 , wherein the noise detection circuitry includes an output coupled to the coefficient filter circuitry.

13 . The apparatus of claim 10 , wherein the noise detection circuitry includes:

detection threshold circuitry;

combination circuitry coupled to the averaging circuitry and coupled to the coefficient filter circuitry; and

comparator circuitry coupled to the detection threshold circuitry, coupled to the combination circuitry, coupled to the averaging circuitry, and coupled to the coefficient filter circuitry.

14 . The apparatus of claim 13 ,

wherein the combination circuitry is configurable to generate an error value based on a difference between a first value received from the averaging circuitry and a second value received from the coefficient filter circuitry, and

wherein the comparator circuitry is configurable to:

receive a threshold value from the detection threshold circuitry; and

compare the error value to the threshold value.

15 . The apparatus of claim 10 , further comprising:

coefficient circuitry coupled to the coefficient filter circuitry; and

programmable circuitry coupled to the period calculator circuitry, coupled to the averaging circuitry, and coupled to the coefficient circuitry.

16 . The apparatus of claim 10 , further comprising:

first oscillator circuitry coupled to the period calculator circuitry;

second oscillator circuitry coupled to the period calculator circuitry;

real-time clock (RTC) accumulator circuitry; and

clock controller circuitry coupled to the coefficient filter circuitry, the first oscillator circuitry, the second oscillator circuitry, and the RTC accumulator circuitry, the clock controller circuitry is configurable to:

determine whether the apparatus is in a standby mode;

when not in the standby mode, increment a value of the RTC accumulator circuitry based on the first oscillator circuitry; and

when in the standby mode, increment the value of the RTC accumulator circuitry by a count of the coefficient filter circuitry.

17 . An apparatus comprising:

period calculator circuitry configurable to determine a number of cycles of a first signal in a period of a second signal;

averaging circuitry coupled to the period calculator circuitry and configurable to determine an average of the number of cycles of the first signal in a plurality of periods of the second signal; and

coefficient filter circuitry coupled to the averaging circuitry and configurable to filter the average of the number of cycles of the first signal based on a filter coefficient.

18 . The apparatus of claim 17 , further comprising noise detection circuitry coupled to the averaging circuitry and the coefficient filter circuitry, the noise detection circuitry configurable to:

determine a count difference between an average of the number of cycles and a filtered number of cycles from the coefficient filter circuitry; and

detect random telegraph noise based on a comparison of the count difference to a threshold count.

19 . The apparatus of claim 18 , wherein the noise detection circuitry is further configurable to set an initial value of the coefficient filter circuitry to the average of the number of cycles based on a detection of the random telegraph noise.

20 . The apparatus of claim 17 , further comprising a multiplexer configurable to output, to the coefficient filter circuitry, the number of cycles received from the period calculator circuitry or the average of the number of cycles received from the averaging circuitry,

wherein the coefficient filter circuitry is configurable to filter the number of cycles or the average of the number of cycles based on the filter coefficient.