IP Library Granted Patent US 12683557
Granted Patent B2
US 12683557 · App. 17/857,132 · Granted Jul 14, 2026

AI-assisted power amplifier optimization

Inventors: Po-Yu Chen (Hsinchu City, TW); Hao Chen (Hsinchu City, TW); Yi-Min Tsai (Hsinchu City, TW); Hao Yun Chen (Hsinchu City, TW); Hsien-Kai Kuo (Hsinchu City, TW); Hantao Huang (Singapore, SG); Hsin-Hung Chen (Hsinchu City, TW); Yu Hsien Chang (Hsinchu City, TW); Yu-Ming Lai (Hsinchu City, TW); Lin Sen Wang (Hsinchu City, TW); Chi-Tsan Chen (Hsinchu City, TW); Sheng-Hong Yan (Hsinchu City, TW)
Assignee: MediaTek Inc.
H03F1/3205G06F18/214G06N3/063H03F1/0222
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Quick Facts
Patent No.
US 12683557
App. No.
17/857,132
Granted
Jul 14, 2026
Kind
B2
Abstract

A compensator compensates for the distortions of a power amplifier circuit. A power amplifier neural network (PAN) is trained to model the power amplifier circuit using pre-determined input and output signal pairs that characterize the power amplifier circuit. Then a compensator is trained to pre-distort a signal received by the PAN. The compensator uses a neural network trained to optimize a loss between a compensator input and a PAN output, and the loss is calculated according to a multi-objective loss function that includes one or more time-domain loss function and one or more frequency-domain loss functions. The trained compensator performs signal compensation to thereby output a pre-distorted signal to the power amplifier circuit.

Claims (61)

1 . A method of compensating for power amplifier distortions, comprising:

training a power amplifier neural network (PAN) to model a power amplifier circuit using pre-determined input and output signal pairs that characterize the power amplifier circuit;

training a compensator to pre-distort a signal received by the PAN, wherein the compensator uses a neural network trained to optimize a loss between a compensator input and a PAN output, and the loss is calculated according to a multi-objective loss function that includes one or more time-domain loss functions and one or more frequency-domain loss functions; and

performing signal compensation by the trained compensator to thereby output a pre-distorted signal to the power amplifier circuit, wherein the one or more time-domain loss functions include at least one of:

a time-domain error vector magnitude (EVM) calculated from a difference between PAN output symbols and ideal quadrature amplitude modulation (QAM) symbols, and

a time-domain mean square error (MSE) calculated from a difference between the compensator input and the PAN output.

2 . The method of claim 1 , wherein training the compensator further comprises:

training a coefficient generator neural network (CGN) to generate filter coefficients for a digital pre-distorter (DPD) that pre-distorts the signal received by the PAN, wherein the CGN is trained to optimize the loss between the input of the DPD and the PAN output.

3 . The method of claim 2 , wherein inputs of the CGN includes the PAN output and a digitally-clipped output of the DPD.

4 . The method of claim 1 , wherein training the compensator further comprises:

training a coefficient generator neural network (CGN) to generate delta coefficients; and

accumulating the delta coefficients over time to generate filter coefficients for a digital pre-distorter (DPD) that pre-distorts the signal received by the PAN, wherein the CGN is trained to optimize the loss between the input of the DPD and the PAN output.

5 . The method of claim 1 , wherein training the compensator further comprises:

training a digital pre-distorter (DPD) neural network that pre-distorts the signal received by the PAN, wherein the DPD neural network is trained to optimize the loss between the input of the DPD neural network and the PAN output.

6 . A system comprising:

memory to store neural network models; and

processing hardware coupled to the memory, the processing hardware operative to:

train a power amplifier neural network (PAN) to model a power amplifier circuit using pre-determined input and output signal pairs that characterize the power amplifier circuit;

train a compensator to pre-distort a signal received by the PAN, wherein the compensator uses a neural network trained to optimize a loss between a compensator input and a PAN output, and the loss is calculated according to a multi-objective loss function that includes one or more time-domain loss functions and one or more frequency-domain loss functions; and

perform signal compensation by the trained compensator to thereby output a pre-distorted signal to the power amplifier circuit, wherein the one or more time-domain loss functions include at least one of:

a time-domain error vector magnitude (EVM) calculated from a difference between PAN output symbols and ideal quadrature amplitude modulation (QAM) symbols, and

a time-domain mean square error (MSE) calculated from a difference between the compensator input and the PAN output.

7 . The system of claim 6 , wherein the power amplifier circuit is a digital circuit.

8 . The system of claim 6 , wherein the power amplifier circuit is an analog circuit.

9 . The system of claim 6 , wherein the processing hardware is further operative to:

train a coefficient generator neural network (CGN) to generate filter coefficients for a digital pre-distorter (DPD) that pre-distorts the signal received by the PAN, wherein the CGN is trained to optimize the loss between the input of the DPD and the PAN output.

10 . The system of claim 6 , wherein the processing hardware is further operative to:

train a coefficient generator neural network (CGN) to generate delta coefficients; and

accumulate the delta coefficients over time to generate filter coefficients for a digital pre-distorter (DPD) that pre-distorts the signal received by the PAN, wherein the CGN is trained to optimize the loss between the input of the DPD and the PAN output.

11 . The system of claim 6 , wherein the processing hardware is further operative to:

train a digital pre-distorter (DPD) neural network that pre-distorts the signal received by the PAN, wherein the DPD neural network is trained to optimize the loss between the input of the DPD neural network and the PAN output.

12 . A method of compensating for power amplifier distortions, comprising:

training a power amplifier neural network (PAN) to model a power amplifier circuit using pre-determined input and output signal pairs that characterize the power amplifier circuit;

training a compensator to pre-distort a signal received by the PAN, wherein the compensator uses a neural network trained to optimize a loss between a compensator input and a PAN output, and the loss is calculated according to a multi-objective loss function that includes one or more time-domain loss functions and one or more frequency-domain loss functions; and

performing signal compensation by the trained compensator to thereby output a pre-distorted signal to the power amplifier circuit, wherein the one or more frequency-domain loss functions include at least one of:

a frequency-domain specification loss, which is a difference between an adjacent channel leakage power ratio (ACLR) of the compensator input and an ACLR of the PAN output, wherein the ACLR is a ratio of filtered mean power centered on an assigned channel frequency to filtered mean power centered on an adjacent channel frequency, and

a frequency-domain mean absolute error (MAE) calculated from a difference between Short Time Fourier Transform (STFT) of the compensator input and STFT of the PAN output.

13 . The method of claim 12 , wherein training the compensator further comprises:

training a coefficient generator neural network (CGN) to generate filter coefficients for a digital pre-distorter (DPD) that pre-distorts the signal received by the PAN, wherein the CGN is trained to optimize the loss between the input of the DPD and the PAN output.

14 . The method of claim 12 , wherein training the compensator further comprises:

training a coefficient generator neural network (CGN) to generate delta coefficients; and

accumulating the delta coefficients over time to generate filter coefficients for a digital pre-distorter (DPD) that pre-distorts the signal received by the PAN, wherein the CGN is trained to optimize the loss between the input of the DPD and the PAN output.

15 . The method of claim 12 , wherein training the compensator further comprises:

training a digital pre-distorter (DPD) neural network that pre-distorts the signal received by the PAN, wherein the DPD neural network is trained to optimize the loss between the input of the DPD neural network and the PAN output.

16 . A system comprising:

memory to store neural network models; and

processing hardware coupled to the memory, the processing hardware operative to:

train a power amplifier neural network (PAN) to model a power amplifier circuit using pre-determined input and output signal pairs that characterize the power amplifier circuit;

train a compensator to pre-distort a signal received by the PAN, wherein the compensator uses a neural network trained to optimize a loss between a compensator input and a PAN output, and the loss is calculated according to a multi-objective loss function that includes one or more time-domain loss functions and one or more frequency-domain loss functions; and

perform signal compensation by the trained compensator to thereby output a pre-distorted signal to the power amplifier circuit, wherein the one or more frequency-domain loss functions include at least one of:

a frequency-domain specification loss, which is a difference between an adjacent channel leakage power ratio (ACLR) of the compensator input and an ACLR of the PAN output, wherein the ACLR is a ratio of filtered mean power centered on an assigned channel frequency to filtered mean power centered on an adjacent channel frequency, and

a frequency-domain mean absolute error (MAE) calculated from a difference between Short Time Fourier Transform (STFT) of the compensator input and STFT of the PAN output.

17 . The system of claim 16 , wherein the power amplifier circuit is a digital circuit.

18 . The system of claim 16 , wherein the power amplifier circuit is an analog circuit.

19 . The system of claim 16 , wherein the processing hardware is further operative to:

train a coefficient generator neural network (CGN) to generate filter coefficients for a digital pre-distorter (DPD) that pre-distorts the signal received by the PAN, wherein the CGN is trained to optimize the loss between the input of the DPD and the PAN output.

20 . The system of claim 16 , wherein the processing hardware is further operative to:

train a coefficient generator neural network (CGN) to generate delta coefficients; and

accumulate the delta coefficients over time to generate filter coefficients for a digital pre-distorter (DPD) that pre-distorts the signal received by the PAN, wherein the CGN is trained to optimize the loss between the input of the DPD and the PAN output.

21 . The system of claim 16 , wherein the processing hardware is further operative to:

train a digital pre-distorter (DPD) neural network that pre-distorts the signal received by the PAN, wherein the DPD neural network is trained to optimize the loss between the input of the DPD neural network and the PAN output.