RFIC with substrate partition

1 . An integrated circuit, comprising:

a first substrate comprising a first substrate material;

a second substrate comprising a second substrate material different than the first substrate material;

a conductive interconnect between the first substrate and the second substrate;

an input circuit formed on the second substrate configured to receive an input signal;

a matching network circuit formed on the first substrate configured to receive the input signal from the input circuit;

an output matching circuit formed on the first substrate configured to receive an output signal from the matching network circuit;

an oscillator circuit formed on the second substrate configured to generate an RF signal; and

a mixing circuit formed on the second substrate configured to receive an output of the output matching circuit and an output of the oscillator circuit.

2 . The integrated circuit of claim 1 , wherein the first substrate material is a high resistance substrate.

3 . The integrated circuit of claim 2 , wherein the first substrate material includes glass.

4 . The integrated circuit of claim 2 , wherein the first substrate material includes silicon on insulator (SOI).

5 . The integrated circuit of claim 2 , wherein the matching network circuit includes passive components.

6 . The integrated circuit of claim 2 , wherein the second substrate material includes silicon.

7 . The integrated circuit of claim 2 , further comprising an amplifier circuit formed on the second substrate.

8 . The integrated circuit of claim 7 , wherein the amplifier circuit includes a common source device.

9 . The integrated circuit of claim 8 , further comprising a common gate circuit formed on the first substrate, wherein the conductive interconnect electrically connects the common gate circuit to the common source circuit.

10 . The integrated circuit of claim 1 , further comprising:

a third substrate comprising a third substrate material, the third substrate including an amplifier circuit; and

wherein the conductive interconnect electrically connects the third amplifier circuit to the matching network circuit.

11 . The integrated circuit of claim 1 , wherein the conductive interconnect includes at least one of a via, a solder bump, and/or a bonding pad.

12 . A radio frequency (RF) circuit, comprising:

an RF amplifier stage including:

a silicon substrate forming an amplifier circuit;

a high-resistance substrate forming a first matching network circuit; and

a first conductive interconnect electrically connecting the amplifier circuit and the matching network circuit; and

an RF oscillator circuit including:

the silicon substrate forming an RF oscillator circuit;

the high-resistance substrate forming a second matching network circuit; and

a second conductive interconnect electrically connecting the RF oscillator circuit and the second matching network circuit.

13 . The RF circuit of claim 12 , wherein the amplifier circuit includes a common source device.

14 . The RF circuit of claim 12 , wherein the high resistance substrate is a silicon on insulator (SOI) substrate.

15 . The RF circuit of claim 12 , wherein the high resistance substrate is a glass substrate.

16 . The RF circuit of claim 12 , wherein the first and second conductive interconnects include at least one of a via, a solder bump, and/or a bonding pad.

17 . A method, comprising:

providing a first substrate comprising a first substrate material;

providing a second substrate comprising a second substrate material different than the first substrate material;

receiving an input signal by an input circuit formed on the second substrate;

receiving the input signal from the input circuit by a matching network circuit formed on the first substrate;

providing an output signal by the matching network to an output matching circuit formed on the first substrate;

generating an RF signal by an oscillator circuit formed on the second substrate; and

receiving an output of the output matching circuit and an output of the oscillator circuit by a mixing circuit formed on the second substrate.

18 . The method of claim 17 , wherein the first substrate material includes glass.

19 . The method of claim 17 , wherein the first substrate material includes silicon on insulator (SOI).

20 . The method of claim 17 , wherein the second substrate material includes silicon.