IP Library › Granted Patent US 12683584
Granted Patent B2
US 12683584 · App. 18/973,795 · Granted Jul 14, 2026

Filter and multiplexer

Inventor: Jyunichi Hamasaki (Tokyo, JP)
Assignee: TAIYO YUDEN CO., LTD.
H03H9/6433H03H9/64H03H9/6443
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Quick Facts
Patent No.
US 12683584
App. No.
18/973,795
Granted
Jul 14, 2026
Kind
B2
Abstract

A filter includes a piezoelectric substrate, a multimode filter provided on the piezoelectric substrate, the multimode filter including input IDTs and output IDTs, the input IDTs being connected to an input terminal, the output IDTs being connected to an output terminal and arranged alternately with the input IDTs, and an inductor having a first end, which is connected to two or more and half or less IDTs of the input IDTs and the output IDTs, and a second end connected to a ground, the two or more and half or less IDTs including at least one input IDT of the input IDTs and at least one output IDT of the output IDTs.

Claims (17)

1 . A filter comprising:

a piezoelectric substrate;

a multimode filter provided on the piezoelectric substrate, the multimode filter including input IDTs and output IDTs, the input IDTs being connected to an input terminal, the output IDTs being connected to an output terminal and arranged alternately with the input IDTs; and

an inductor having a first end, which is connected to two or more and half or less IDTs of the input IDTs and the output IDTs, and a second end connected to a ground, the two or more and half or less IDTs including at least one input IDT of the input IDTs and at least one output IDT of the output IDTs.

2 . The filter according to claim 1 , wherein the first end of the inductor is connected to two or more and three or less IDTs of the input IDTs and the output IDTs, and is not connected to a remaining IDT.

3 . The filter according to claim 1 , wherein the first end of the inductor is connected to a first IDT, which is located outermost among the input IDTs and the output IDTs in a direction in which the input IDTs and the output IDTs are arranged, and a second IDT, which is next to the first IDT, and is not connected to a remaining IDT.

4 . The filter according to claim 2 , wherein an inductance of the inductor is 3 nH or less.

5 . The filter according to claim 1 , further comprising:

a first wiring line that is provided on the piezoelectric substrate and connects a remaining input IDT other than the at least one input IDT of the input IDTs to a ground; and

a second wiring line that is provided on the piezoelectric substrate, is separated from the first wiring line on the piezoelectric substrate, and connects a remaining output IDT other than the at least one output IDT of the output IDTs to a ground.

6 . The filter according to claim 1 , further comprising:

a mounting substrate on which the multimode filter is mounted; and

a chip that is mounted on the mounting substrate and has the inductor formed therein.

7 . The filter according to claim 1 , further comprising:

a mounting substrate on which the multimode filter is mounted; and

a line that is provided in the mounting substrate and forms the inductor.

8 . A multiplexer comprising the filter according to claim 1 .