Tuning device, system and method
In accordance with an embodiment, A device includes: a first node configured to be coupled to a component to be tuned; a second node configured to be coupled to an inductor; a path including a capacitor coupling the first node and the second node; and a first switch coupled between the second node and a ground node.
1 . A device, comprising:
a first node configured to be coupled to a component to be tuned and to a first terminal of an inductor;
a second node configured to be coupled to a second terminal of the inductor different from the first terminal;
a first switch coupled between the second node and a ground node; and
a circuit path coupled between the first node and the second node, the circuit path comprising a capacitor coupled in series with a second switch, wherein the second switch is configured to be open when the first switch is closed, the second switch is configured to be closed when the first switch is open, and the capacitor is configured to reduce an effect of a parasitic off capacitance of the first switch at the first node when the first switch is open.
2 . The device of claim 1 , further comprising a third switch coupled in parallel to the capacitor.
3 . The device of claim 1 , wherein the capacitor comprises a tunable capacitor.
4 . The device of claim 1 , wherein:
the capacitor and the first switch are provided in an integrated chip device;
the first node is a first terminal of the integrated chip device; and
the second node is a second terminal of the integrated chip device.
5 . The device of claim 1 , wherein:
the first switch is provided in an integrated chip device, wherein the capacitor is provided external to the integrated chip device;
a first terminal of the integrated chip device is coupled to a first end of the capacitor and the first node corresponds to a second end of the capacitor; and
the second node is a second terminal of the integrated chip device.
6 . The device of claim 5 , wherein:
the second switch is provided in the integrated chip device; and
the first terminal is coupled between the capacitor and the second switch.
7 . The device of claim 1 , further comprising:
a plurality of second nodes, including the second node, configured to be coupled to a second terminal of a respective one of a plurality of inductors that includes the inductor;
a plurality of circuit paths, including the path, coupling the first node and a respective one of the plurality of second nodes; and
a plurality of first switches that includes the first switch, each of the plurality of first switches coupled between the respective one of the plurality of second nodes and the ground node.
8 . The device of claim 7 , wherein each path includes a respective one of a plurality of capacitors, including the capacitor.
9 . The device of claim 7 , wherein the capacitor is a common capacitor of the plurality of circuit paths.
10 . A system, comprising:
the device of claim 1 ,
the component to be tuned coupled to the first node; and
the inductor having the first terminal coupled to the second node and the second terminal coupled to the component being tuned.
11 . The system of claim 10 , wherein the component to be tuned comprises an antenna.
12 . A method, of tuning a component coupled to a device comprising a first node coupled to a component to be tuned and to a first terminal of an inductor; a second node coupled to a second terminal of the inductor different from the first terminal; a first switch coupled between the second node and a ground node; and a circuit path coupled between the first node and the second node, the circuit path comprising a capacitor coupled in series with a second switch, the method comprising:
opening the second switch and closing the first switch in a first tuning configuration; and
closing the second switch and opening the first switch in a second tuning configuration.
13 . The method of claim 12 , wherein the capacitor is configured to reduce an effect of a parasitic off capacitance of the first switch at the first node when the first switch is open.
14 . The method of claim 12 , wherein:
the component is an antenna;
the device further comprises:
a plurality of second nodes, including the second node, configured to be coupled to a respective one of a plurality of inductors that includes the inductor,
a plurality of circuit paths, including the circuit path, coupling the first node and a respective one of the plurality of second nodes, and
a plurality of first switches that includes the first switch, each of the plurality of first switches coupled between the respective one of the plurality of second nodes and the ground node; and
the method further comprises selectively operating the first plurality of first switches.
15 . A radio-frequency (RF) system comprising:
an antenna;
a plurality of inductors, each inductor of the plurality of inductors having a first end coupled to the antenna at an antenna node;
a plurality of first switches, each first switch of the plurality of first switches having a first load terminal coupled to a second end of a corresponding inductor of the plurality of inductors and a second load terminal different from the first load terminal;
a plurality of second switches, each second switch of the plurality of second switches having a third load terminal coupled to the second end of the corresponding inductor of the plurality of inductors, and a fourth load terminal different from the third load terminal coupled to an RF ground node; and
a capacitor coupled between the antenna node and the second load terminal of each first switch of the plurality of first switches, wherein the capacitor is configured to reduce an effect of a parasitic off capacitance of each first switch at the antenna node.
16 . The system of claim 15 , wherein the plurality of first switches and the plurality of second switches are disposed on an integrated circuit.
17 . The system of claim 16 , further comprising a controller disposed on the integrated circuit and coupled to control nodes of the plurality of first switches and the plurality of second switches.
18 . The system of claim 16 , wherein the capacitor is disposed on the integrated circuit.
19 . The system of claim 15 , further comprising a controller configured to:
open one second switch of the plurality of second switches and close a corresponding first switch of the plurality of first switches in a first tuning configuration; and
close the one second switch of the plurality of second switches and open the corresponding first switch of the plurality of first switches in the first tuning configuration.
20 . The system of claim 15 , wherein the capacitor comprises a tunable capacitor.