IP Library Granted Patent US 12684151
Granted Patent B2
US 12684151 · App. 19/061,755 · Granted Jul 14, 2026

Mesh decoding device, mesh encoding device, mesh decoding method, and program

Inventors: Hitoshi Nishimura (Fujimino, JP); Kei Kawamura (Fujimino, JP)
Assignee: KDDI CORPORATION
H04N19/44H04N19/13H04N19/18H04N19/597H04N19/63
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Quick Facts
Patent No.
US 12684151
App. No.
19/061,755
Granted
Jul 14, 2026
Kind
B2
Abstract

A circuit of a mesh decoding device 200: generates a binarization syntax by performing arithmetic decoding on the displacement bit stream; updates a context value using the binarization syntax; generates a context value for output using the context value, a bit position, and a syntax read from a context buffer 206D; generates and outputs a syntax to the context buffer 206D by multi-value conversion of the binarization syntax; generates a coefficient level value from the syntax.

Claims (44)

1 . A mesh decoding device comprising:

a circuit that decodes a displacement bit stream to generate and output a displacement, wherein

the circuit:

generates a binarization syntax by performing arithmetic decoding on the displacement bit stream;

updates a context value using the binarization syntax;

obtains and accumulates the context values, bit positions, and syntax in a context buffer;

generates a context value for output using the context value, the bit position, and the syntax read from the context buffer;

generates and outputs the syntax to the context buffer by multi-value conversion of the binarization syntax;

generates a coefficient level value from the syntax;

generates transformed coefficients by inversely quantizing the coefficient level values; and

generates a prediction residual by applying an inverse wavelet transform to the transformed coefficients.

2 . The mesh decoding device according to claim 1 , wherein

the circuit

decodes the binarization syntax in units of blocks,

generates the syntax in units of blocks, and

generates the coefficient level value in units of blocks.

3 . The mesh decoding device according to claim 2 , wherein

the circuit generates the coefficient level value by using a flag indicating that there is a non-zero coefficient in the block, a coordinate position of a leading non-zero coefficient in a scan order in the block, a flag indicating whether a coefficient to be decoded is the non-zero coefficient, a flag indicating whether an absolute value of the non-zero coefficient is 2 or more, a flag indicating whether an absolute value of the non-zero coefficient is 3 or more, a flag indicating a positive or negative sign of the non-zero coefficient, and a value obtained by subtracting 3 from an absolute value of the non-zero coefficient.

4 . The mesh decoding device according to claim 3 , wherein

the circuit:

selects a context number of a decoding target block according to a flag indicating that there is a non-zero coefficient in a decoded right adjacent block;

selects a context number of a flag indicating a positive or negative sign of the non-zero coefficient in the decoding target block according to a flag indicating that there is a non-zero coefficient in the decoded right adjacent block, and

in a case where there is a coefficient having an absolute value of 2 or more in the decoded right adjacent block, selects a context number of an absolute value of a non-zero coefficient in the decoding target block.

5 . A mesh decoding method comprising:

decoding a displacement bit stream to generate and output a displacement, wherein

the decoding includes:

generating a binarization syntax by performing arithmetic decoding on the displacement bit stream;

updating a context value using the binarization syntax;

obtaining and accumulating the context values, bit positions, and syntax in a context buffer;

generating a context value for output using the context value, the bit position, and the syntax read from the context buffer;

generating and outputting the syntax to the context buffer by multi-value conversion of the binarization syntax;

generating a coefficient level value from the syntax;

generating transformed coefficients by inversely quantizing the coefficient level values; and

generating a prediction residual by applying an inverse wavelet transform to the transformed coefficients.

6 . A non-transitory computer-readable storage medium storing a program for causing a computer to function as a mesh decoding device, wherein

the program includes a circuit that decodes a displacement bit stream to generate and output a displacement, and

the circuit includes:

generates a binarization syntax by performing arithmetic decoding on the displacement bit stream;

updates a context value using the binarization syntax;

obtains and accumulates the context values, bit positions, and syntax in s context buffer;

generates a context value for output using the context value, the bit position, and the syntax read from the context buffer;

generates and outputs the syntax to the context buffer by multi-value conversion of the binarization syntax;

generates a coefficient level value from the syntax; generates transformed coefficients by inversely quantizing the coefficient level values; and

generates a prediction residual by applying an inverse wavelet transform to the transformed coefficients.