IP Library Granted Patent US 12684704
Granted Patent B2
US 12684704 · App. 17/234,471 · Granted Jul 14, 2026

Ultra thin dielectric printed circuit boards with thin laminates and method of manufacturing thereof

Inventors: Shinichi Iketani (Sunnyvale, CA); Toshiya Suzuki (Sagamihara, JP)
Assignee: Sanmina Corporation
H05K3/4655H05K1/119H05K3/007H05K3/0097H05K3/4673H05K3/4682H05K3/02H05K3/4664H05K2201/0191H05K2203/013
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Quick Facts
Patent No.
US 12684704
App. No.
17/234,471
Granted
Jul 14, 2026
Kind
B2
Abstract

Ultra-thin dielectric printed circuit boards (PCBs) are provided. An ultra-thin dielectric layer may be coupled to a first conductive layer on a first side of the ultra-thin dielectric layer. A second conductive layer may be coupled to a second side of the ultra-thin dielectric layer, and the ultra-thin dielectric layer is thinner than at least one of the first conductive layer and the second conductive layer. The second conductive layer may be patterned to form electrical paths. The patterned second conductive layer may be filled with a dielectric filler. One or more conductive layers and one or more ultra-thin dielectric layers may also be coupled to the second conductive layer.

Claims (18)

1 . An ultra-thin dielectric printed circuit board (PCB), comprising:

a first conductive layer comprising a first side and a second side opposite the first side, the first conductive layer detachably coupled on the first side to a disposable base by an adhesive layer between and in direct contact with the first side of the first conductive layer and the disposable base, the adhesive layer facilitating detachment of the disposable base by peeling the disposable base from the first conductive layer;

a patterned second conductive layer comprising a first side and a second side opposite the first side;

a first ultra-thin dielectric layer coupled to the second side of the first conductive layer and to the first side of the second conductive layer, where the first ultra-thin dielectric layer is positioned between and in direct contact with the second side of the first conductive layer and the first side of the second conductive layer across the entirety of second side of the first conductive layer and the entirety of the first side of the second conductive layer, and a portion of the first ultra-thin dielectric layer that is positioned between the second side of the first conductive layer and the first side of the second conductive layer is thinner than the first conductive layer between the first side and the second side of the first conductive layer and thinner than the second conductive layer between the first side and the second side of the second conductive layer;

a dielectric filler filling the patterned second conductive layer;

a third conductive layer comprising a first side and a second side opposite the first side, the third conductive layer detachably coupled on the first side to the disposable base on a side of the disposable base opposite from the first conductive layer, the third conductive layer coupled to the disposable base by another adhesive layer between and in direct contact with the first side of the third conductive layer and the disposable base, the other adhesive layer facilitating detachment of the disposable base by peeling the disposable base from the third conductive layer;

a patterned fourth conductive layer comprising a first side and a second side opposite the first side; and

a second ultra-thin dielectric layer coupled to the second side of the third conductive layer and to the first side of the fourth conductive layer, where the second ultra-thin dielectric layer is positioned between and in direct contact with the second side of the third conductive layer and the first side of the fourth conductive layer across the entirety of second side of the third conductive layer and the entirety of the first side of the fourth conductive layer.

2 . The ultra-thin dielectric printed circuit board of claim 1 , further comprising:

at least one additional conductive layer and at least one additional ultra-thin dielectric layer coupled to the second conductive layer.

3 . The ultra-thin dielectric printed circuit board of claim 2 , wherein at least one ultra-thin dielectric layer is thinner than at least one adjacent conductive layer.

4 . The ultra-thin dielectric printed circuit board of claim 2 , wherein each ultra-thin dielectric layer is thinner than at least one adjacent conductive layer.

5 . The ultra-thin dielectric printed circuit board of claim 1 , wherein the ultra-thin dielectric layer has a thickness of 50 micron or less while the first and second conductive layers are each more than 50 micron thick.

6 . The ultra-thin dielectric printed circuit board of claim 1 , wherein the ultra-thin dielectric layer has thickness of 20 micron or less while the first and second conductive layers are each more than 20 micron thick.

7 . The ultra-thin dielectric printed circuit board of claim 1 , wherein the ultra-thin dielectric layer has thickness of 10 micron or less while the first and second conductive layers are each more than 10 micron thick.

8 . The ultra-thin dielectric printed circuit board of claim 1 , wherein the first and second conductive layers each have a thickness of 3 micron, 5 micron, 9 micron, 12 micron, 0.5 ounce copper, 1 ounce copper, or 2 ounce copper.

9 . The ultra-thin dielectric printed circuit board of claim 1 , wherein the first conductive layer is patterned, and the first conductive layer, the first ultra-thin dielectric layer, and the second conductive layer comprise at least a portion of a first subassembly structure, and further comprising:

a patterned outer conductive layer coupled to the first subassembly structure, opposite the first conductive layer, to form a first subassembly core.