IP Library Granted Patent US 12684787
Granted Patent B2
US 12684787 · App. 18/367,468 · Granted Jul 14, 2026

Semiconductor device and method for fabricating the same

Inventors: Chang-Yih Chen (Tainan City, TW); Kuo-Hsing Lee (Hsinchu County, TW); Chun-Hsien Lin (Tainan City, TW)
Assignee: UNITED MICROELECTRONICS CORP.
H10D1/047H10D1/66H10D30/024H10D30/6211H10D84/811
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Quick Facts
Patent No.
US 12684787
App. No.
18/367,468
Granted
Jul 14, 2026
Kind
B2
Abstract

A method for fabricating a semiconductor device includes the steps of first providing a substrate comprising a non-metal-oxide semiconductor capacitor (non-MOSCAP) region and a MOSCAP region, forming a first fin-shaped structure on the MOSCAP region, forming a doped layer on the substrate of the non-MOSCAP region and the first fin-shaped structure on the MOSCAP region, removing the doped layer on the non-MOSCAP region, and then performing an anneal process to drive dopants from the doped layer into the first fin-shaped structure.

Claims (17)

1 . A semiconductor device, comprising:

a substrate comprising a non-metal-oxide semiconductor capacitor (non-MOSCAP) region and a MOSCAP region;

a first fin-shaped structure on the MOSCAP region;

a liner on the first fin-shaped structure;

a gate oxide layer on the non-MOSCAP region and the MOSCAP region; and

a gate electrode on the gate oxide layer.

2 . The semiconductor device of claim 1 , further comprising:

a second fin-shaped structure on the non-MOSCAP region;

the liner on the first fin-shaped structure;

the gate oxide layer on the substrate and the second fin-shaped structure of the non-MOSCAP region and the liner of the MOSCAP region; and

the gate electrode on the gate oxide layer.

3 . The semiconductor device of claim 2 , wherein a concentration of dopants in the first fin-shaped structure is greater than a concentration of dopants in the second fin-shaped structure.

4 . The semiconductor device of claim 1 , wherein the non-MOSCAP region comprises an input/output (I/O) region and a low-voltage (LV) region.

5 . The semiconductor device of claim 1 , further comprising a maximum concentration of dopants at a surface of the first fin-shaped structure.

6 . The semiconductor device of claim 1 , further comprising a first concentration of dopants at a surface of the first fin-shaped structure and a second concentration of dopants at a first depth of the first fin-shaped structure, wherein the second concentration is less than the first concentration.

7 . The semiconductor device of claim 6 , wherein a decrease from the first concentration to the second concentration comprises an exponential decay.

8 . The semiconductor device of claim 1 , wherein the first fin-shaped structure comprises phosphorus.