Semiconductor device including a gate electrode formed in a trench and method of manufacturing the same

1 . A semiconductor device comprising:

a semiconductor substrate of a first conductivity type;

a first trench formed in the semiconductor substrate;

a first gate insulating film formed in the first trench;

a first gate electrode formed on the first gate insulating film so as to bury an interior of the first trench;

a base region of a second conductivity type which is an opposite conductivity type to the first conductivity type, the base region being formed in the semiconductor substrate such that a bottom portion of the base region is shallower than a bottom portion of the first trench; and

a plurality of emitter regions of the first conductivity type formed in the base region,

wherein the first trench extends in a first direction, in a plan view,

wherein adjacent ones of the plurality of emitter regions are spaced apart from each other by a first distance along the first direction,

wherein each of the plurality of emitter regions has a first width in the first direction,

wherein the first distance is wider than ⅕ of the first width and narrower than the first width,

wherein the semiconductor device further comprises a counter doped region formed between adjacent ones of the plurality of emitter regions, and

wherein the counter doped region is an impurity region of the second conductivity type having an impurity concentration lower than that of the base region, or an intrinsic semiconductor region.

2 . The semiconductor device according to claim 1 , wherein the first distance is 0.2 μm or more.

3 . The semiconductor device according to claim 1 ,

wherein a second distance between the first gate electrode and each of the plurality of emitter regions on an upper side of a boundary between the base region and each of the plurality of emitter regions is wider than a third distance between the first gate electrode and the base region on a lower side of the boundary,

wherein the second distance becomes wider as it is closer to an upper surface of the first gate electrode, and

wherein a difference between the second distance at the upper surface of the first gate electrode and the third distance is 30 nm or more and 100 nm or less.

4 . The semiconductor device according to claim 3 , wherein the plurality of emitter regions include both arsenic and phosphorus.

5 . The semiconductor device according to claim 1 , comprising:

a second trench formed in the semiconductor substrate;

a second gate insulating film formed in the second trench; and

a second gate electrode formed on the second gate insulating film so as to bury an interior of the second trench,

wherein the second trench extends in the first direction and is adjacent to the first trench in a second direction orthogonal to the first direction, in a plan view,

wherein the base region and the plurality of emitter regions are formed between the first trench and the second trench,

wherein each of the first gate electrode and the second gate electrode is supplied with a gate potential, and

wherein each of the base region and the plurality of emitter regions is supplied with an emitter potential.

6 . The semiconductor device according to claim 1 , comprising:

a second trench formed in the semiconductor substrate;

a second gate insulating film formed in the second trench; and

a second gate electrode formed on the second gate insulating film so as to bury an interior of the second trench,

wherein the second trench extends in the first direction and is adjacent to the first trench in a second direction orthogonal to the first direction, in a plan view,

wherein the base region and the plurality of emitter regions are formed between the first trench and the second trench,

wherein the first gate electrode is supplied with a gate potential, and

wherein each of the base region, the plurality of emitter regions, and the second gate electrode is supplied with an emitter potential.