IP Library Granted Patent US 12684795
Granted Patent B2
US 12684795 · App. 18/061,065 · Granted Jul 14, 2026

Method for forming a FET device

Inventors: Boon Teik Chan (Wilsele, BE); Naoto Horiguchi (Leuven, BE); Julien Ryckaert (Schaerbeek, BE)
Assignee: Imec vzw
H10D30/014H10D30/43H10D30/6735H10D62/121H10D62/151H10D64/017H10D84/0167H10D84/017H10D84/038H10D84/85H10P30/204H10P30/21H10P30/22H10P50/242H10P50/691
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Quick Facts
Patent No.
US 12684795
App. No.
18/061,065
Granted
Jul 14, 2026
Kind
B2
Abstract

A method for forming a FET device is provided. The method includes: forming a fin structure comprising a layer stack comprising channel layers and non-channel layers alternating the channel layers; etching each of first and second fin parts from each of first and second opposite sides of the fin structure such that a set of source cavities extending through the first fin part is formed in a first set of layers of the layer stack, and such that a set of drain cavities extending through the second fin part is formed in the first set of layers of the layer stack; filling the source and drain cavities with a dummy material; while masking the fin structure from the second side: removing the dummy material by etching from the first side, and subsequently, forming a source body and a drain body, each comprising a respective common body portion and a set of prongs protruding from the respective common body portion into the source and drain cavities, respectively; and while masking the fin structure from the first side: etching a third fin part from the second side such that a set of gate cavities extending through the third fin part is formed in a second set of layers, and subsequently, forming a gate body comprising a common gate body portion and a set of gate prongs protruding from the common gate body portion into the gate cavities.

Claims (36)

1 . A method for forming a field-effect transistor device, the method comprising:

forming a fin structure comprising a layer stack comprising channel layers and non-channel layers alternating the channel layers, the fin structure comprising a first fin part, a second fin part and a third fin part intermediate the first and second fin parts;

etching each of the first and second fin parts laterally from each of first and second opposite sides of the fin structure such that a set of source cavities extending through the first fin part is formed in a first set of layers of the layer stack, and such that a set of drain cavities extending through the second fin part is formed in the first set of layers of the layer stack;

filling the source and drain cavities with a dummy material;

while masking the fin structure from the second side:

removing the dummy material from the source and drain cavities by etching from the first side, and

subsequently, forming a source body and a drain body, each comprising a respective common body portion along the first side and a set of prongs protruding from the respective common body portion into the source and drain cavities, respectively, and abutting the channel layers; and

while masking the fin structure from the first side:

etching the third fin part laterally from the second side such that a set of gate cavities extending through the third fin part is formed in a second set of layers defined by the non-channel layers of the layer stack, the first set of layers are of a material that is different than that of the second set of layers, and

subsequently, forming a gate body comprising a common gate body portion along the second side and a set of gate prongs protruding from the common gate body portion into the gate cavities.

2 . The method according to claim 1 , wherein the channel layers are of a channel material and the non-channel layers are alternatingly first non-channel layers of a first layer material and second non-channel layers of a second layer material, and

wherein the etching of the first fin part and the second fin part to form the source and drain cavities comprises selectively etching the first layer material, and

wherein the etching of the third fin part to form the gate cavities comprises selectively etching the second layer material.

3 . The method according to claim 2 , wherein the first layer material is a first dielectric material.

4 . The method according to claim 3 , wherein forming the fin structure comprises:

forming a preliminary fin structure comprising the channel layers and non-channel layers alternating the channel layers, the non-channel layers being alternatingly sacrificial layers of a sacrificial semiconductor material and the second non-channel layers of the second layer material;

forming a support structure in abutment with the preliminary fin structure; and

while the support structure supports the preliminary fin structure, replacing the sacrificial layers with the first non-channel layers.

5 . The method according to claim 2 , further comprising, prior to forming the source and drain cavities:

etching each of the first and second fin parts laterally from each of the first and second sides such that a set of cavities extending through the first and second fin parts is formed in the second non-channel layers, and

filling the cavities with a second dielectric material to form second dielectric layers in the cavities.

6 . The method according to claim 5 , wherein the etching of the third fin part to form the gate cavities comprises selectively etching the second layer material from the second side to remove the second layer material remaining between the second dielectric layers.

7 . The method according to claim 2 , wherein at least one of the source and drain cavities are etched to extend partly into the third fin part or the gate cavities are etched to extend partly into the first and second fin parts.

8 . The method according to claim 1 , wherein the non-channel layers are of a first layer material and the channel layers are of a channel material,

wherein the etching of the first fin part and the second fin part to form the source and drain cavities comprises selectively etching the channel material, and a

wherein forming the set of gate cavities comprises selectively etching the first layer material.

9 . The method according to claim 8 , wherein the first layer material is a first dielectric material.

10 . The method according to claim 1 , further comprising, subsequent to the filling of the source and drain cavities with the dummy material:

depositing a cover material along the first and second sides of the fin structure; and

forming openings in the cover material along the first and second fin parts to expose each of the first and second fin parts from only the first side; and

wherein the method subsequently comprises conducting the removing of the dummy material and the forming of the source and drain bodies via the openings in the cover material.

11 . The method according to claim 10 , wherein the cover material is conformally deposited.

12 . The method according to claim 1 , further comprising forming a gate trench along the third fin part to expose the third fin part from only the second side, wherein the gate trench is formed in an insulating material deposited along the first and second sides of the fin structure, and wherein the etching of the third fin part and the forming of the gate body are conducted via the gate trench.

13 . The method according to claim 12 , wherein the etching of the third fin part and the forming of the gate body are conducted subsequent to forming the source and drain bodies, and wherein the method comprises depositing the insulating material to embed the fin structure and the source and drain bodies.

14 . The method according to claim 1 , wherein forming the source and drain bodies comprises epitaxially growing a source/drain material in the set of source cavities and the set of drain cavities to form prongs therein, and further growing the source/drain material on the prongs such that the source/drain material merges to form a respective common body portion of the source and drain bodies.

15 . The method according to claim 1 , further comprising subjecting the first and second fin parts to an ion implantation process while masking the third fin part from the ion implantation process.