IP Library Granted Patent US 12684803
Granted Patent B2
US 12684803 · App. 18/417,813 · Granted Jul 14, 2026

Semiconductor device and method of manufacturing the same

Inventors: Yuan Tsung Tsai (Tainan City, TW); Yao Jui Kuo (Tainan City, TW); Chia-Wei Fan (Tainan City, TW); Ying Ming Wang (Tainan City, TW); Shih-Hao Chen (Hsinchu County, TW); Ling-Sung Wang (Tainan City, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
H10D30/62H10D30/024H10D30/6219
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Quick Facts
Patent No.
US 12684803
App. No.
18/417,813
Granted
Jul 14, 2026
Kind
B2
Abstract

A semiconductor device and method of manufacturing the same are provided. The semiconductor device includes a first fin and a gate electrode. The first fin extends along a first direction. The gate electrode has a sidewall extending along a second direction different from the first direction. The sidewall of the gate electrode defines an indentation adjacent to the first fin in a top view.

Claims (35)

1 . A semiconductor device, comprising:

a first fin extending along a first direction; and

a gate electrode having a sidewall extending along a second direction different from the first direction,

wherein the sidewall of the gate electrode defines an indentation adjacent to the first fin in a top view.

2 . The semiconductor device of claim 1 , further comprising:

a second fin extending along the first direction, wherein the sidewall of the gate electrode further extends across the second fin, and the sidewall of the gate electrode defines a protruding portion adjacent to the second fin.

3 . The semiconductor device of claim 1 , further comprising:

a second fin extending along the first direction, wherein the gate electrode has a first length along the first direction adjacent to the first fin and a second length along the second direction adjacent to the second fin, wherein the first length is different form the second fin.

4 . The semiconductor device of claim 3 , wherein the first fin and the second fin are included in a fin group, and the first fin is an outer fin of the fin group.

5 . The semiconductor device of claim 3 , wherein the sidewall of the gate electrode and a sidewall of the first fin form an acute angle in a top view.

6 . The semiconductor device of claim 5 , wherein the acute angle is equal to or greater than about 30° and less than about 90°.

7 . The semiconductor device of claim 5 , wherein the sidewall of the gate electrode and a sidewall of the second fin form an obtuse angle in a top view.

8 . The semiconductor device of claim 3 , further comprising:

a gate dielectric disposed on the first fin, wherein the gate dielectric defines an indentation adjacent to the first fin in a top view.

9 . The semiconductor device of claim 1 , wherein the indentation overlaps the first fin along a third direction substantially orthogonal to the first direction and the second direction.

10 . A semiconductor device, comprising:

a first fin group comprising a first fin and a second fin adjacent to the first fin, each of which extends along a first direction, wherein the first fin is an outer fin of the first fin group; and

a gate electrode extending along a second direction and across at least the first fin and the second fin of the first fin group,

wherein the gate electrode has a first narrow portion adjacent to the first fin.

11 . The semiconductor device of claim 10 , wherein the second fin is an intra-fin of the first fin group, and the gate electrode has a wide portion adjacent to the second fin.

12 . The semiconductor device of claim 11 , wherein the gate electrode has a middle portion between the first fin and the second fin, and a length of the middle portion is greater than a length of the first narrow portion along the first direction.

13 . The semiconductor device of claim 12 , wherein the length of the middle portion is less than a length of the wide portion along the first direction.

14 . The semiconductor device of claim 10 , further comprising:

a second fin group distinct from the first fin group, wherein a distance between the first fin group and the second fin group is greater than a pitch of the first fin group, and the second fin group comprises a third fin which is an outer fin of the second fin group, and the gate electrode has a second narrow portion adjacent to the third fin.

15 . The semiconductor device of claim 10 , wherein the gate electrode has a sidewall extending along the second direction, the sidewall of the gate electrode and a sidewall of the first fin form a first angle, and the sidewall of the gate electrode and a sidewall of the second fin form a second angle different from the first angle from a top view.

16 . The semiconductor device of claim 15 , wherein the first angle is less than the second angle.

17 . The semiconductor device of claim 15 , wherein the first angle is an acute angle.

18 . The semiconductor device of claim 15 , wherein the second angle is an obtuse angle.

19 . A method of manufacturing a semiconductor device, comprising:

forming a fin group on a substrate, wherein the fin group comprises a first fin and a second fin abutting the first fin, and the first fin is an outer fin of the fin group;

forming a semiconductor material layer over the fin group; and

patterning the semiconductor material layer to form a dummy gate electrode, wherein the dummy gate electrode has a narrow portion adjacent to the first fin and a wide portion adjacent to the second fin.

20 . The method of claim 19 , further comprising:

removing the dummy gate electrode; and

forming a gate electrode having a narrow portion adjacent to the first fin and a wide portion adjacent to the second fin.