High performance laterally-diffused metal-oxide semiconductor structure
The present disclosure relates to semiconductor structures and, more particularly, to laterally-diffused metal-oxide semiconductors and methods of manufacture. The structure includes: a drift region within a semiconductor substrate; a shallow trench isolation structure extending within the drift region; and a gate structure over the semiconductor substrate and extending within the shallow trench isolation structure.
1 . A structure comprising:
a drift region within a semiconductor substrate and which includes a trench structure;
a shallow trench isolation structure comprising a trench within insulator material, the insulator material and the trench extending within the trench structure of the drift region; and
a gate structure comprising gate dielectric materials fully extending into the trench of the shallow trench isolation structure and over the semiconductor substrate and on an upper surface of the drift region, and a gate electrode material, wherein one of the gate dielectric materials comprise a high-k dielectric material, and wherein the insulator material of the shallow trench isolation structure is adjacent to a source region and is constrained to cover the drift region and a portion of the semiconductor substrate which is devoid of an implanted region.
2 . The structure of claim 1 , wherein the drift region comprises an N-well and the gate dielectric materials are directly on an upper surface of the insulator material of the shallow trench isolation structure within the trench.
3 . The structure of claim 1 , wherein the gate electrode material is partially within the shallow trench isolation structure and over a surface of the drift region and the gate dielectric materials over the semiconductor substrate.
4 . The structure of claim 3 , wherein the gate electrode material comprises a workfunction metal, and wherein the gate dielectric materials comprise a layer of dielectric material that has a same thickness and a same composition as insulator material of the shallow trench isolation structure, wherein the layer of dielectric material and insulator material run coextensively along the trench of the shallow trench isolation structure.
5 . The structure of claim 1 , wherein the gate dielectric materials further comprise a low-k dielectric material under the high-k dielectric material and is sidewalls of the shallow trench isolation structure.
6 . The structure of claim 1 , wherein the gate electrode material comprises a polysilicon material and one of the gate dielectric materials comprises a low-k dielectric material.
7 . The structure of claim 1 , wherein the gate structure is symmetrically positioned within the shallow trench isolation structure.
8 . The structure of claim 1 , wherein the gate structure is asymmetrically positioned within the shallow trench isolation structure such that one sidewall of the shallow trench isolation structure is thicker than an opposing sidewall.
9 . The structure of claim 1 , wherein the gate structure comprises tapered sidewalls.
10 . The structure of claim 1 , wherein the gate structure comprises sidewalls that are parallel to sidewalls of the shallow trench isolation structure.
11 . A structure comprising:
a trench structure extending into a semiconductor substrate;
a shallow trench isolation structure extending into the trench structure, wherein sidewalls of the shallow trench isolation structure is fully contained within the trench structure; and
a gate structure comprising gate dielectric materials and a gate electrode, the gate dielectric materials and the gate electrode being over an upper surface of the semiconductor substrate and fully extending within a trench of the shallow trench isolation structure, wherein the gate dielectric materials comprise a layer of dielectric material that has a same thickness and a same composition as insulator material of the shallow trench isolation structure, wherein the layer of dielectric material and the insulator material run coextensively along the trench of the shallow trench isolation structure.
12 . The structure of claim 11 , further comprising an N-well within the semiconductor substrate, wherein the shallow trench isolation structure and a portion of the gate structure extend to within the N-well, and wherein the gate dielectric materials and the gate electrode extend over an upper surface of the N-well.
13 . The structure of claim 11 , wherein the gate electrode comprises a workfunction metal and the gate dielectric materials comprise a low-k dielectric material and a high-k dielectric material, the low-k dielectric material being sidewalls of the shallow trench isolation structure.
14 . The structure of claim 11 , wherein the gate electrode comprises a polysilicon material and the gate dielectric material comprises a low-k dielectric material.
15 . The structure of claim 11 , wherein the gate structure is symmetrically positioned within the shallow trench isolation structure, and wherein the gate dielectric material is adjacent to a source region and is constrained to over the drift region and a portion of the semiconductor substrate which is devoid of an implant.
16 . The structure of claim 11 , wherein the gate structure is asymmetrically positioned within the shallow trench isolation structure.
17 . The structure of claim 11 , wherein the gate structure comprises tapered sidewalls.
18 . The structure of claim 11 , wherein the gate structure comprises sidewalls that are parallel to sidewalls of the shallow trench isolation structure.
19 . A method comprising:
forming a trench structure extending into a semiconductor substrate;
forming a shallow trench isolation structure extending into the trench structure, wherein sidewalls of the shallow trench isolation structure is fully contained within the trench structure; and
forming a gate structure comprising gate dielectric materials and a gate electrode, the gate dielectric materials and the gate electrode being over an upper surface of the semiconductor substrate and fully extending within a trench of the shallow trench isolation structure, wherein the gate dielectric materials comprise a layer of dielectric material that has a same thickness and a same composition as insulator material of the shallow trench isolation structure, wherein the layer of dielectric material and the insulator material run coextensively along the trench of the shallow trench isolation structure.