Semiconductor device, inverter circuit, drive device, vehicle, and elevator

1 . A semiconductor device, comprising:

a silicon carbide layer having a first face parallel to a first direction and a second direction crossing the first direction and a second face facing away from the first face;

a first trench disposed in the silicon carbide layer, disposed on a side of the first face, and extending in the first direction;

a second trench disposed in the silicon carbide layer, disposed on the side of the first face, extending in the first direction, and disposed in the second direction with respect to the first trench;

a third trench disposed in the silicon carbide layer, disposed on the side of the first face, extending in the second direction, and continuous with the first trench and the second trench;

a fourth trench disposed in the silicon carbide layer, disposed on the side of the first face, extending in the first direction, disposed between the first trench and the second trench, and spaced from the third trench in the first direction;

a fifth trench disposed in the silicon carbide layer, disposed on the side of the first face, extending in the first direction, disposed between the fourth trench and the second trench, and spaced from the third trench in the first direction;

a sixth trench disposed in the silicon carbide layer, disposed on the side of the first face, extending in the second direction, continuous with the fourth trench and the fifth trench, and spaced from the third trench in the first direction;

an eighth trench disposed in the silicon carbide layer, disposed on the side of the first face, extending in the second direction, continuous with the fourth trench, and spaced from the first trench in the first direction;

a first silicon carbide region of n-type disposed in the silicon carbide layer;

a second silicon carbide region of p-type disposed in the silicon carbide layer and disposed between the first silicon carbide region and the first face, a distance of the second silicon carbide region from the second face being larger than a distance from the second face to the first trench;

a third silicon carbide region of n-type disposed in the silicon carbide layer and disposed between the second silicon carbide region and the first face;

a gate electrode disposed in the first trench, the second trench, the third trench, the fourth trench, the fifth trench, the sixth trench, and the eighth trench;

a gate insulating layer disposed between the gate electrode and the silicon carbide layer;

a first wiring layer disposed on the side of the first face with respect to the silicon carbide layer, disposed in the first direction with respect to the third trench, and extending in the second direction;

a first conductive layer crossing the third trench, connected to the gate electrode, and is electrically connected to the first wiring layer;

a second wiring layer disposed on the side of the first face with respect to the silicon carbide layer, disposed in the first direction with respect to the eighth trench, and extending in the second direction;

a second conductive layer crossing the eighth trench, connected to the gate electrode, and electrically connected to the second wiring layer;

a first electrode disposed on the side of the first face with respect to the silicon carbide layer and electrically connected to the third silicon carbide region; and

a second electrode disposed on a side of the second face with respect to the silicon carbide layer, wherein

the first conductive layer is disposed between the gate electrode and the first wiring layer, and the first conductive layer is in direct contact with the gate electrode and the first wiring layer,

the first conductive layer is in direct contact with the gate electrode at a position where the first conductive layer crosses the third trench,

a distance between the sixth trench and the first wiring layer in the first direction is smaller than a distance between the sixth trench and the second wiring layer in the first direction,

a distance between the third trench and the first wiring layer in the first direction is smaller than a distance between the third trench and the second wiring layer in the first direction,

the sixth trench is spaced from the third trench in the first direction, and

a distance between the eighth trench and the second wiring layer in the first direction is smaller than a distance between the eighth trench and the first wiring layer in the first direction.

2 . The semiconductor device according to claim 1 ,

wherein the gate electrode, the first wiring layer, and the first conductive layer contain a same material.

3 . The semiconductor device according to claim 2 ,

wherein the same material is polycrystalline silicon.

4 . The semiconductor device according to claim 1 ,

wherein the gate insulating layer is disposed between the first conductive layer and the silicon carbide layer.

5 . The semiconductor device according to claim 1 ,

wherein a shape of the third trench crossing the first conductive layer on the first face is a linear shape.

6 . The semiconductor device according to claim 1 ,

wherein a side surface of the third trench crossing the first conductive layer is formed by an a-face or an m-face.

7 . The semiconductor device according to claim 1 ,

wherein a sum of a width of the first trench in the second direction and a distance between the first trench and the fourth trench in the second direction is equal to or less than 2 μm.

8 . An inverter circuit, comprising:

the semiconductor device according to claim 1 .

9 . A drive device, comprising:

the semiconductor device according to claim 1 .

10 . A vehicle, comprising:

the semiconductor device according to claim 1 .

11 . An elevator, comprising:

the semiconductor device according to claim 1 .

12 . The semiconductor device according to claim 1 , further comprising:

a ninth trench disposed in the silicon carbide layer, disposed on the side of the first face, extending in the second direction, continuous with the second trench, and spaced from the third trench in the first direction; and

a tenth trench disposed in the silicon carbide layer, disposed on the side of the first face, extending in the first direction, and continuous with the ninth trench, wherein

the second trench is disposed between the tenth trench and the fifth trench.

13 . The semiconductor device according to claim 12 , further comprising:

an eleventh trench disposed in the silicon carbide layer, disposed on the side of the first face, extending in the second direction, continuous with the tenth trench, and spaced from the third trench in the second direction.

14 . The semiconductor device according to claim 13 , further comprising:

a third conductive layer crossing the eleventh trench, connected to the gate electrode, and electrically connected to the first wiring layer.

15 . The semiconductor device according to claim 14 , further comprising:

a twelfth trench disposed in the silicon carbide layer, disposed on the side of the first face, and extending in the second direction, continuous with the fifth trench, wherein

a distance between the twelfth trench and the second wiring layer in the first direction is smaller than a distance between the twelfth trench and the first wiring layer in the first direction.

16 . The semiconductor device according to claim 15 , further comprising:

a fourth conductive layer crossing the twelfth trench, connected to the gate electrode, and electrically connected to the second wiring layer.

17 . The semiconductor device according to claim 1 , wherein

a width of the first conductive layer in the second direction is larger than a cell pitch.

18 . The semiconductor device according to claim 1 , wherein

the fourth trench and the fifth trench are neighboring to each other in the second direction without intervening any other trenches.