IP Library Granted Patent US 12684850
Granted Patent B2
US 12684850 · App. 18/681,997 · Granted Jul 14, 2026

Silicon carbide semiconductor device

Inventor: Shota Sambonsuge (Osaka, JP)
Assignee: MITSUMI ELECTRIC CO., LTD.
H10D64/252H10D30/668H10D62/8325H10D64/258H10D64/62H10D30/0297H10W72/01935H10W72/29H10W72/59H10W72/90H10W72/921H10W72/923H10W72/934H10W72/952
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Quick Facts
Patent No.
US 12684850
App. No.
18/681,997
Granted
Jul 14, 2026
Kind
B2
Abstract

A silicon carbide semiconductor device includes a silicon carbide substrate having a first main surface; a first electrode formed on the first main surface; and a plating film formed on the first electrode, wherein a first irregularity is formed on a surface of the plating film, and H1/H2 is 0.10 or less, where H1 is a difference between a maximum value of a distance to a top of the first irregularity from the first main surface and a minimum value of a distance to a bottom of the first irregularity from the first main surface, and H2 is a minimum value of a thickness of the plating film.

Claims (16)

1 . A silicon carbide semiconductor device comprising:

a silicon carbide substrate having a first main surface;

a first electrode formed on the first main surface; and

a plating film formed on the first electrode,

wherein a first irregularity is formed on a surface of the plating film, and H1/H2 is 0.10 or less, where H1 is a difference between a maximum value of a distance to a top of the first irregularity from the first main surface and a minimum value of a distance to a bottom of the first irregularity from the first main surface, and H2 is a minimum value of a thickness of the plating film.

2 . The silicon carbide semiconductor device as claimed in claim 1 , wherein a second irregularity is formed on a surface of the first electrode, and H3/H4 is 0.30 or greater and 0.80 or less, where H3 is a difference between a maximum value of a distance to a top of the second irregularity from the first main surface and a minimum value of a distance to a bottom of the second irregularity from the first main surface, and H4 is a minimum value of a thickness of the first electrode.

3 . The silicon carbide semiconductor device as claimed in claim 1 , wherein H1/H2 is 0.01 or greater and 0.10 or less.

4 . The silicon carbide semiconductor device as claimed in claim 1 , wherein the first electrode contains aluminum or an aluminum alloy.

5 . The silicon carbide semiconductor device as claimed in claim 1 , wherein the plating film includes a nickel plating film.

6 . The silicon carbide semiconductor device as claimed in claim 5 , wherein an average crystal grain size at a surface of the nickel plating film is 1.0 μm or greater and 20.0 μm or less.

7 . The silicon carbide semiconductor device as claimed in claim 5 , wherein the plating film further includes either a gold plating film or a silver plating film formed on or above the nickel plating film.

8 . The silicon carbide semiconductor device as claimed in claim 7 , wherein the plating film further includes a palladium plating film that is formed between the nickel plating film and either the gold plating film or the silver plating film.

9 . The silicon carbide semiconductor device as claimed in claim 1 , wherein the plating film includes a copper plating film.

10 . The silicon carbide semiconductor device as claimed in claim 9 , wherein an average crystal grain size at a surface of the copper plating film is 1.0 μm or greater and 20.0 μm or less.

11 . The silicon carbide semiconductor device as claimed in claim 9 , wherein the plating film further includes a tantalum nitride film or a titanium nitride film formed between the first electrode and the copper plating film.

12 . The silicon carbide semiconductor device as claimed in claim 1 , further comprising a second electrode formed on the first main surface; and an insulating film that covers the second electrode, wherein the first electrode covers the insulating film.