Field plated bidirectional HEMT structure
The present disclosure relates to semiconductor structures and, more particularly, to a bidirectional device, methods of manufacture and methods of operation. The structure includes: a first gate structure adjacent to a first source region; a second gate structure adjacent to a second source region; and field plates adjacent to the first gate structure, the second gate structure and a surface of an active layer of the first gate structure and the second gate structure.
1 . A structure comprising:
a first gate structure adjacent to a first source region;
a first source contact connecting to the first source region;
a second gate structure adjacent to a second source region;
a second source contact connecting to the second source region;
a first field plate which surrounds the first gate structure, the first source region and the first source contact; and
a second field plate which surrounds the second gate structure, the second source region and the second source contact,
wherein the first field plate and the second field plate are above a surface of an active semiconductor layer, and the active semiconductor layer acts as a channel region for the first gate structure and the second gate structure.
2 . The structure of claim 1 , wherein the first gate structure and the second gate structure comprise bidirectional gate structures.
3 . The structure of claim 2 , wherein the active semiconductor layer comprises AlGaN/GaN material.
4 . The structure of claim 1 , wherein the first field plate completely surrounds the first source region and the second field plate completely surrounds the second source region.
5 . The structure of claim 1 , further comprising a first gate contact extending to the first gate structure and a second gate contact extending to the second gate structure, and a first sidewall spacer on sidewalls of the first gate contact and a second sidewall spacer on sidewalls of the second gate contact, wherein the first and second field plates abut a respective sidewall spacer such that the first and second field plates are electrically and physically isolated from the first and second-gate contacts, respectively.
6 . The structure of claim 1 , wherein the first field plate is electrically isolated from a first gate contact connecting to the first gate structure and the second field plate is electrically isolated from a second gate contact connecting to the second gate structure.
7 . A structure comprising:
a first gate structure on an active semiconductor material and which comprises a first source region;
a first gate contact metal extending to the first gate structure;
a first sidewall spacer surrounding the first gate contact metal;
a second gate structure on the active semiconductor material and which comprises a second source region;
a second gate contact metal extending to the second gate structure
a second sidewall spacer surrounding the second gate contact metal;
a first source contact connecting to the first source region;
a second source contact connecting to the second source region; and
a first field plate surrounding the first source contact and the first gate structure;
a second field plate surrounding the second source contact and the second gate structure,
wherein the first field plate further abut to the first sidewall spacer of the first gate structure and the second field plate further abuts to the second sidewall spacer of the second gate structure such that the first and second field plates are electrically and physically isolated from the first gate contact metal and the second gate contact metal, respectively.
8 . The structure of claim 7 , wherein the first gate structure and the second gate structure comprise GaN gate structures.
9 . The structure of claim 8 , wherein the first and second gate contact metals extend to the first gate structure and the second gate structure, respectively.
10 . The structure of claim 7 , wherein the first gate structure and the second gate structure comprise bidirectional gate structures.
11 . The structure of claim 7 , wherein the first field plate individually-surrounds the first source region and the second field plate surrounds the second source region.
12 . The structure of claim 11 , wherein the first field plate completely surrounds the first source contact and the second field plate completely surrounds the second source contact.
13 . The structure of claim 7 , wherein the first field plate is aligned with the first gate structure and the second field plate is aligned with the second gate structure.
14 . A method comprising:
forming a first gate structure adjacent to a first source region;
forming a first source contact connecting to the first source region;
forming a second gate structure adjacent to a second source region;
forming a second source contact connecting to the second source region;
forming a first field plates-plate which each of surrounds the first gate structure, the first source region and the first source contact, and
forming a second field plate which surrounds the second gate structure, the second source region and the second source contact,
wherein the first field plate and the second field plate are above a surface of an active semiconductor layer, and the active semiconductor layer comprises an active region which acts as a channel region for the first gate structure and the second gate structure.