Display panel having a bonding region

1 . A display panel, comprising:

a base substrate comprising a display region and a bonding region; and

a plurality of bonding pin structures on the bonding region of the base substrate arranged in a plurality of columns, respectively;

wherein a respective bonding pin structure comprises a respective bonding pin and connection lines on two ends of the respective bonding pin, respectively;

bonding pins of the plurality of bonding pin structures are arranged in N rows, N is a positive integer equal to or greater than 4; and

(N−1) number of connection lines pass through a region between two adjacent bonding pins arranged in a same row.

2 . The display panel of claim 1 , wherein at least two adjacent connection lines of the (N−1) number of connection lines between the two adjacent bonding pins arranged in a same row are in two different layers.

3 . The display panel of claim 2 , wherein the two adjacent connection lines are in a first conductive layer and a second conductive layer, respectively; and

the display panel further comprising an insulating layer between the first conductive layer and the second conductive layer.

4 . The display panel of claim 3 , wherein the (N−1) number of connection lines between the two adjacent bonding pins arranged in a same row are alternately in the first conductive layer and the second conductive layer.

5 . The display panel of claim 1 , wherein, in a x1-th row of the N rows, a first group of (N−1) number of connection lines pass through a region between two adjacent bonding pins arranged in the x1-th row, 1≤x1≤N, x1 being an integer;

in a x2-th row of the N rows, a second group of (N−1) number of connection lines pass through a region between two adjacent bonding pins arranged in the x2-th row, 1≤x2≤N, x2 being an integer different from x1;

the (N−1) number of connection lines in the first group are alternately in a first conductive layer and a second conductive layer, with a connection line in the first group closest to a first one of the two adjacent bonding pins being in the first conductive layer;

the (N−1) number of connection lines in the second group are alternately in the first conductive layer and the second conductive layer, with a connection line in the second group closest to the first one of the two adjacent bonding pins being in the second conductive layer; and

x2=x1+1, or x1=x2+1.

6 . The display panel of claim 1 , wherein, in at least a x-th row of the N rows, a x-th row bonding pin comprises at least a first sub-layer, 1≤x≤N, x being an integer;

in at least a y-th row of the N rows, a y-th row bonding pin comprises at least a second sub-layer, 1≤y≤N, y being an integer different from x;

the second sub-layer is absent in the x-th row bonding pin;

the first sub-layer is absent in the y-th row bonding pin;

the first sub-layer and the second sub-layer are in a first conductive layer and a second conductive layer, respectively; and

the display panel further comprises an insulating layer between the first conductive layer and the second conductive layer.

7 . The display panel of claim 6 , wherein the x-th row and the y-th row are two adjacent rows.

8 . The display panel of claim 1 , wherein, in at least a z-th row, a z-th row bonding pin comprises a first portion and a second portion along an extension direction of the z-th row bonding pin, 1≤z≤N, z being an integer;

the first portion comprises at least a first sub-layer;

the second portion comprises at least a second sub-layer;

the second sub-layer is absent in the first portion;

the first sub-layer is absent in the second portion;

the first sub-layer and the second sub-layer are in a first conductive layer and a second conductive layer, respectively; and

the display panel further comprises an insulating layer between the first conductive layer and the second conductive layer.

9 . The display panel of claim 8 , wherein the z-th row bonding pin further comprises at least a third sub-layer in both the first portion and the second portion;

wherein the third sub-layer connects the first sub-layer in the first portion to the second sub-layer in the second portion;

the third sub-layer is in a first signal line layer; and

the display panel further comprising an inter-layer dielectric layer between the second conductive layer and the first signal line layer.

10 . The display panel of claim 9 , wherein the z-th row bonding pin further comprises a fourth sub-layer in both the first portion and the second portion;

wherein the fourth sub-layer is on a side of the third sub-layer away from the first sub-layer and the second sub-layer, the fourth sub-layer being in contact with the third sub-layer;

the fourth sub-layer is in a touch electrode layer; and

the display panel further comprising at least a touch insulating layer between the touch electrode layer and the first signal line layer.

11 . The display panel of claim 10 , wherein the z-th row is a row other than a first row and a N-th row.

12 . The display panel of claim 1 , wherein, in at least a z-th row, a z-th row bonding pin comprises a first portion and a second portion along an extension direction of the z-th row bonding pin, 1≤z≤N, z being an integer;

in a first adjacent row, a first adjacent row bonding pin comprises at least a first adjacent portion adjacent to the first portion;

in a second adjacent row, a second adjacent row bonding pin comprises at least a second adjacent portion adjacent to the second portion;

the first portion is in a same layer as the first adjacent portion and in a different layer from the second portion and the second adjacent portion; and

the second portion is in a same layer as the second adjacent portion and in a different layer from the first portion and the first adjacent portion.

13 . The display panel of claim 1 , wherein N is an even number;

in a group of (N−1) number of connection lines between two adjacent i-th row bonding pins in a i-th row of the N rows, a first connection line and a (N−1)-th connection line are in a same layer, 1≤i≤N, i being an integer; and

the two adjacent i-th row bonding pins comprise a sub-layer in a different layer from the first connection line and the (N−1)-th connection line, and in a same layer as a second connection line or a (N−2)-th connection line.

14 . The display panel of claim 1 , wherein N is an odd number;

in a group of (N−1) number of connection lines between two adjacent i-th row bonding pins in a i-th row of the N rows, a first connection line and a (N−1)-th connection line are in different layers, 1≤i≤N, i being an integer.

15 . The display panel of claim 14 , wherein i=1 or i=N.

16 . The display panel of claim 1 , wherein, in at least a z-th row, a z-th row bonding pin comprises a first portion and a second portion along an extension direction of the z-th row bonding pin, 1≤z≤N, z being an integer; and

in a group of (N−1) number of connection lines between two adjacent z-th row bonding pins in the z-th row, a first connection line and a (N−1)-th connection line are in different layers.

17 . The display panel of claim 16 , wherein the first connection line is in a same layer as the first portion and in a different layer from the second portion and the (N−1)-th connection line; and

the (N−1)-th connection line is in a same layer as the second portion and in a different layer from the first portion and the first connection line.

18 . The display panel of claim 16 , wherein the first connection line is in a same layer as the second portion and in a different layer from the first portion and the (N−1)-th connection line; and

the (N−1)-th connection line is in a same layer as the first portion and in a different layer from the second portion and the first connection line.

19 . The display panel of claim 1 , wherein N=5.

20 . A display apparatus, comprising the display panel of claim 1 , and one or more integrated circuit bonded to the plurality of bonding pin structures in the bonding region of the display panel.