Shielded deep trench capacitor structure and methods of forming the same
A moat trench laterally surrounding a device region is formed in a substrate. A conductive metallic substrate enclosure structure is formed in the moat trench. Deep trenches are formed in the substrate, and a trench capacitor structure is formed in the deep trenches. The substrate may be thinned by removing a backside portion of the substrate. A backside surface of the conductive metallic substrate enclosure structure is physically exposed. A backside metal layer is formed on a backside surface of the substrate and a backside surface of the conductive metallic substrate enclosure structure. A metallic interconnect enclosure structure and a metallic cap plate may be formed to provide a metallic shield structure configured to block electromagnetic radiation from impinging into the trench capacitor structure.
1 . A method of forming a semiconductor structure, the method comprising:
forming a moat trench laterally surrounding a device region in a substrate;
forming a conductive metallic substrate enclosure structure in the moat trench;
forming deep trenches in the substrate;
forming a trench capacitor structure comprising a layer stack including at least two metallic electrode layers interlaced with at least one node dielectric layer in the deep trenches;
forming a backside metal layer on a backside of the trench capacitor structure;
forming a capacitor die by dicing an assembly comprising the backside metal layer and the substrate, wherein the capacitor die comprises the trench capacitor structure, a diced portion of the substrate, a diced portion of the backside metal layer, and the conductive metallic substrate enclosure structure;
attaching the capacitor die to a semiconductor die including semiconductor devices therein;
forming a dielectric matrix layer around the capacitor die and over the semiconductor die; and
forming a redistribution interconnect assembly including redistribution metal interconnect structures formed within redistribution dielectric material layers over a combination of the capacitor die and the dielectric matrix layer.
2 . The method of claim 1 , further comprising forming a metallic shield structure configured to block electromagnetic radiation from impinging into the trench capacitor structure, wherein the metallic shield structure comprises:
the conductive metallic substrate enclosure structure;
the backside metal layer;
a metallic interconnect enclosure structure that overlies the trench capacitor structure and laterally surrounds an entirety of an area of the trench capacitor structure in an plan view; and
a metallic cap plate that overlies the area of the trench capacitor structure and adjoined to a top surface of the metallic interconnect enclosure structure.
3 . The method of claim 1 , further comprising attaching an array of solder balls to a subset of the redistribution metal interconnect structures, wherein the backside metal layer is electrically connected to one of the solder balls through a subset of the redistribution metal interconnect structures.
4 . The method of claim 1 , wherein:
the capacitor die comprises the substrate, the trench capacitor structure, the conductive metallic substrate enclosure structure, and the backside metal layer;
after attaching the capacitor die to the semiconductor die, a first subset of the at least two metallic electrode layers of the trench capacitor structure is electrically connected to a first node of semiconductor devices within the semiconductor die, and a second subset of the at least two metallic electrode layers of the trench capacitor structure is electrically connected to a second node of the semiconductor devices within the semiconductor die that is different from the first node; and
the first node comprises a first power-supply node of the semiconductor devices and the second node comprises a second power-supply node of the semiconductor devices that is different from the first power-supply node.
5 . The method of claim 4 , wherein:
the dielectric matrix layer is located around the capacitor die and over the semiconductor die, and wherein the redistribution interconnect assembly includes redistribution metal interconnect structures formed within redistribution dielectric material layers over a combination of the capacitor die and the dielectric matrix layer; and
the dielectric matrix layer comprises a polymer molding compound and has a planarized top surface that is coplanar with a physically exposed surface of the backside metal layer of the capacitor die.
6 . The method of claim 5 , wherein one of the redistribution metal interconnect structures is electrically connected to the backside metal layer through a corresponding portion of the redistribution dielectric material layers.
7 . The method of claim 6 , wherein the semiconductor structure further comprises at least one through-dielectric via structure vertically extending through the dielectric matrix layer and electrically connecting a respective one of the redistribution metal interconnect structures to a node of a semiconductor device within the semiconductor die.
8 . The method of claim 1 , further comprising forming a metallic shield structure configured to block electromagnetic radiation from impinging into the trench capacitor structure, wherein the metallic shield structure comprises:
the conductive metallic substrate enclosure structure; and
the backside metal layer, the backside metal layer being disposed underneath the trench capacitor structure and contacting a bottom surface of the conductive metallic substrate enclosure structure and continuously covering an entire area that is laterally surrounded by the conductive metallic substrate enclosure structure without any opening therethrough.
9 . The method of claim 8 , wherein the metallic shield structure further comprises:
a metallic interconnect enclosure structure that overlies the trench capacitor structure and laterally surrounds an entirety of an area of the trench capacitor structure in a plan view and is free of any lateral opening therethrough; and
a metallic cap plate that overlies the area of the trench capacitor structure and is adjoined to a top surface of the metallic interconnect enclosure structure,
wherein the conductive metallic substrate enclosure structure, the backside metal layer, the metallic interconnect enclosure structure, and the metallic cap plate together form a continuous conductive enclosure around the trench capacitor structure in three dimensions except at metal bonding pad openings.
10 . The method of claim 9 , further comprising:
forming at least one dielectric material layer located over a front surface of the substrate;
forming a first electrode interconnect structure electrically connected to a first subset of the at least two metallic electrode layers in the at least one dielectric material layer; and
forming a second electrode interconnect structure electrically connected to a second subset of the at least two metallic electrode layers and embedded in the at least one dielectric material layer,
wherein the first electrode interconnect structure comprises a first metal bonding pad that is located within the metallic interconnect enclosure structure,
wherein the second electrode interconnect structure comprises a second metal bonding pad that is located within the metallic interconnect enclosure structure, and
wherein the metallic cap plate includes a first opening overlying the first metal bonding pad and a second opening overlying the second metal bonding pad, and the metallic cap plate is free of any other opening overlying the trench capacitor structure.
11 . The method of claim 1 , wherein:
the conductive metallic substrate enclosure structure is formed such that the conductive metallic substrate enclosure structure vertically extends from the front surface of the substrate to the backside surface of the substrate and has a greater depth than the trench capacitor structure, and continuously interfaces with the substrate without any discontinuity along an entire vertical interface between the conductive metallic substrate enclosure structure and the substrate; and
the conductive metallic substrate enclosure structure comprises a metallic nitride liner disposed along sidewalls of the moat trench and a metallic fill material that fills a remaining volume of the moat trench, the conductive metallic substrate enclosure structure having an electrical conductivity of at least 1×10 5 S/cm.
12 . A method of forming a semiconductor structure, the method comprising:
forming deep trenches extending downward from a front surface of a substrate toward a backside surface of the substrate;
forming a trench capacitor structure comprising a layer stack including at least two metallic electrode layers interlaced with at least one node dielectric layer in, and over, the deep trenches;
forming a conductive metallic substrate enclosure structure laterally surrounding the deep trenches, wherein the conductive metallic substrate enclosure structure is free of any lateral opening therethrough;
exposing a backside surface of the conductive metallic substrate enclosure structure by thinning a backside of the substrate;
forming a backside metal layer on the backside surface of the conductive metallic substrate enclosure structure;
forming a capacitor die by dicing an assembly comprising the backside metal layer and the substrate;
attaching the capacitor die to a semiconductor die including semiconductor devices therein such that such that a first subset of the at least two metallic electrode layers is electrically connected to a first node of semiconductor devices within the semiconductor die and a second subset of the at least two metallic electrode layers is electrically connected to a second node of the semiconductor devices within the semiconductor die;
forming a dielectric matrix layer around the capacitor die and over the semiconductor die; and
forming a redistribution interconnect assembly including redistribution metal interconnect structures formed within redistribution dielectric material layers on the backside metal layer and the dielectric matrix layer.
13 . The method of claim 12 , further comprising:
forming at least one dielectric material layer located over the front surface of the substrate; and
forming a metallic interconnect enclosure structure embedded in the at least one dielectric material layer and contacting the conductive metallic substrate enclosure structure, wherein the metallic interconnect enclosure structure is free of any lateral opening and laterally encloses an entire area of the trench capacitor structure in a plan view.
14 . The method of claim 13 , further comprising forming a metallic cap plate over the metallic interconnect enclosure structure, wherein the metallic cap plate laterally extends over the entire area of the trench capacitor structure in the plan view and includes openings therethrough.
15 . The method of claim 14 , further comprising:
forming a first electrode interconnect structure electrically connected to a first subset of the at least two metallic electrode layers in the at least one dielectric material layer; and
forming a second electrode interconnect structure electrically connected to a second subset of the at least two metallic electrode layers and embedded in the at least one dielectric material layer.
16 . The method of claim 15 , wherein:
the first electrode interconnect structure comprises a first metal bonding pad;
the second electrode interconnect structure comprises a second metal bonding pad; and
the metallic cap plate comprises a pair of openings within areas of the first metal bonding pad and the second metal bonding pad.
17 . The method of claim 12 ,
wherein the capacitor die includes a combination of the substrate, the trench capacitor structure, the conductive metallic substrate enclosure structure, and the backside metal layer.
18 . A method of forming a semiconductor structure, the method comprising:
forming deep trenches extending downward from a front surface of a substrate toward a backside surface of the substrate;
forming a trench capacitor structure comprising a layer stack including at least two metallic electrode layers interlaced with at least one node dielectric layer in, and over, the deep trenches, wherein each layer within the layer stack comprises a horizontally-extending portion that overlies a front surface of the substrate and vertically-extending portions located within a respective one of the deep trenches;
forming a conductive metallic substrate enclosure structure laterally surrounding the deep trenches and vertically extending from the front surface of the substrate to the backside surface of the substrate and having a greater depth than the trench capacitor structure;
forming first metallic interconnect structures embedded in dielectric material layers and electrically connected to a respective one of the at least two metallic electrode layers;
forming a metallic interconnect enclosure structure laterally surrounding the first metallic interconnect structures and free of any lateral opening therein;
forming a metallic cap plate overlying and contacting the metallic interconnect enclosure structure and including openings therethrough;
forming a capacitor die by dicing an assembly comprising the substrate and the metallic interconnect enclosure structure;
attaching the capacitor die to a semiconductor die including semiconductor devices therein such that electrical nodes of the trench capacitor structure are electrically connected to electrical nodes of the semiconductor dies through a subset of metal interconnect structures extending through the openings in the metallic cap plate;
forming a dielectric matrix layer around the capacitor die and over the semiconductor die; and
forming a redistribution interconnect assembly including redistribution metal interconnect structures formed within redistribution dielectric material layers over a combination of the capacitor die and the dielectric matrix layer.
19 . The method of claim 18 , further comprising:
physically exposing a backside surface of the conductive metallic substrate enclosure structure by thinning a backside of the substrate; and
forming a backside metal layer contacting the backside surface of the conductive metallic substrate enclosure structure, wherein the backside metal layer continuously extends over an entire area that is laterally surrounded by the conductive metallic substrate enclosure structure without any opening therethrough.
20 . The method of claim 18 , wherein the conductive metallic substrate enclosure structure is in contact with, and is electrically shorted to, a semiconductor material of the substrate.