Semiconductor device
A semiconductor device with a novel structure is provided. The semiconductor device includes a digital calculator, an analog calculator, a first memory circuit, and a second memory circuit. The analog calculator, the first memory circuit, and the second memory circuit each include a transistor including an oxide semiconductor in a channel formation region. The first memory circuit has a function of supplying first weight data to the digital calculator as digital data. The digital calculator has a function of performing product-sum operation using the first weight data. The second memory circuit has a function of supplying second weight data to the analog calculator as analog data. The analog calculator has a function of performing product-sum operation using the second weight data. The amount of current flowing between a source and a drain of at least one of the transistors each including the oxide semiconductor in the channel formation region in the analog calculator and the second memory circuit is the amount of current flowing when the transistor operates in a subthreshold region.
1 . A semiconductor device comprising a digital calculator, an analog calculator, a first memory circuit, and a second memory circuit,
wherein the analog calculator, the first memory circuit, and the second memory circuit each comprise a transistor comprising an oxide semiconductor in a channel formation region,
wherein the first memory circuit is configured to supply first weight data as digital data to the digital calculator,
wherein the digital calculator is configured to perform product-sum operation using the first weight data,
wherein the second memory circuit is configured to supply second weight data as analog data to the analog calculator,
wherein the analog calculator is configured to perform product-sum operation using the second weight data, and
wherein an amount of current flowing between a source and a drain of at least one of the transistors each comprising the oxide semiconductor in the channel formation region in the analog calculator and the second memory circuit is an amount of current flowing when the transistor operates in a subthreshold region.
2 . The semiconductor device according to claim 1 ,
wherein the digital calculator is brought into a non-operation state during operation of the analog calculator, and
wherein the analog calculator is brought into a non-operation state during operation of the digital calculator.
3 . The semiconductor device according to claim 1 ,
wherein the digital calculator performs convolutional operation.
4 . The semiconductor device according to claim 1 ,
wherein the analog calculator performs fully connected operation.
5 . The semiconductor device according to claim 1 ,
wherein the digital calculator comprises a transistor containing silicon in a channel formation region.
6 . The semiconductor device according to claim 5 ,
wherein the digital calculator is provided in a first layer,
wherein the analog calculator, the first memory circuit, and the second memory circuit are provided in a second layer, and
wherein the second layer is provided over the first layer.
7 . The semiconductor device according to claim 6 ,
wherein the first memory circuit is provided to overlap with the digital calculator.