Bonding structures for stacked image sensor
Various embodiments of the present disclosure are directed towards an image sensor including first chip and a second chip. The first chip includes a first substrate, a plurality of photodetectors disposed in the first substrate, a first interconnect structure disposed on a front side of the first substrate, and a first bond structure disposed on the first interconnect structure. The second chip underlies the first chip. The second chip includes a second substrate, a plurality of semiconductor devices disposed on the second substrate, a second interconnect structure disposed on a front side of the second substrate, and a second bond structure disposed on the second interconnect structure. A first bonding interface is disposed between the second bond structure and the first bond structure. The second interconnect structure is electrically coupled to the first interconnect structure by way of the first and second bond structures. At least one of the first bond structure and the second bond structure comprises one or less conductive bonding layer.
1 . A method for forming an image sensor, the method comprising:
forming a plurality of photodetectors within a first substrate;
forming a first interconnect structure on the first substrate;
forming a first bond structure on the first interconnect structure;
forming a plurality of semiconductor devices on a second substrate;
forming a second interconnect structure on the second substrate;
forming a second bond structure on the second interconnect structure, wherein at least one of the first bond structure and the second bond structure comprises a single conductive bonding layer;
forming an integrated circuit (IC) chip comprising a third interconnect structure on a third substrate and a third bond structure on the third interconnect structure;
performing a first bonding process to bond the IC chip to the first substrate, wherein the third bond structure directly contacts the first bond structure; and
performing a second bonding process to bond the first substrate to the second substrate such that a bonding interface is disposed between the first bond structure and the second bond structure, wherein the first bonding process is performed before the second bonding process.
2 . The method of claim 1 , further comprising:
performing a first thinning process on a back side of the third substrate;
forming a through substrate via (TSV) in the third substrate;
forming a fourth bond structure on the back side of the third substrate; and
wherein the second bonding process is performed after the fourth bond structure is formed, wherein the second bond structure directly contacts the fourth bond structure.
3 . The method of claim 1 , further comprising:
performing a second thinning process on a back side of the first substrate after the second bonding process;
forming a back-side isolation structure in the first substrate, wherein the back-side isolation structure is disposed between adjacent photodetectors;
forming a plurality of light filters over the back side of the first substrate; and
forming a plurality of micro-lenses on the plurality of light filters.
4 . The method of claim 1 , wherein forming the first bond structure comprises:
depositing a first bond dielectric on the first interconnect structure;
etching the first bond dielectric to form a plurality of first openings in the first bond dielectric; and
forming a plurality of first bond contacts and a plurality of first bond pads in the plurality of first openings.
5 . The method of claim 4 , wherein forming the second bond structure comprises:
depositing a second bond dielectric on the second interconnect structure;
etching the second bond dielectric to form a plurality of second openings in the second bond dielectric; and
forming a plurality of second bond pads in the plurality of second openings, wherein the single conductive bonding layer comprises the plurality of second bond pads, wherein a first height of the first bond structure is greater than a second height of the second bond structure.
6 . The method of claim 4 , further comprising:
forming a floating diffusion node in the first substrate and adjacent to one or more of the plurality of photodetectors;
forming a plurality of transfer gate structures on the first substrate and adjacent to a corresponding photodetector in the plurality of photodetectors; and
forming a plurality of pixel transistors on the third substrate, wherein the floating diffusion node is electrically coupled to a gate electrode of a first transistor in the plurality of pixel transistors by way of one or more conductive structures in one or both of the first bond structure and the second bond structure.
7 . The method of claim 1 , wherein the single conductive bonding layer comprises a plurality of bond pads or a plurality of bond contacts.
8 . A method for forming an image sensor, the method comprising:
forming a first integrated circuit (IC) chip, comprising:
performing a doping process to form a photodetector in a first substrate;
forming a first interconnect structure on the first substrate;
forming a first bond structure on the first interconnect structure, wherein the first bond structure comprises one or more first conductive bonding levels;
forming a second IC chip, comprising:
forming a plurality of first transistors on a second substrate;
forming a second interconnect structure on a first surface of the second substrate;
forming a second bond structure on the second interconnect structure, wherein the second bond structure comprises a bond dielectric structure and a single conductive bonding level in the bond dielectric structure, wherein a top surface of the single conductive bonding level is aligned with a top surface of the bond dielectric structure and a bottom surface of the single conductive bonding level is aligned with a bottom surface of the bond dielectric structure; and
performing a first bonding process to bond the first IC chip and to the second IC chip such that the first and second IC chips are electrically coupled together, wherein a first bonding interface is between the first and second bond structures, wherein the first bonding interface comprises conductor-to-conductor bonds and dielectric-to-dielectric bonds.
9 . The method of claim 8 , wherein the one or more first conductive bonding levels comprise a plurality of first bond pads and a plurality of first bond contacts between the first bond pads and the first interconnect structure, wherein the single conductive bonding level contacts the plurality of first bond pads.
10 . The method of claim 9 , wherein the single conductive bonding level comprises a plurality of second bond contacts, wherein widths of the second bond contacts are less than widths of the first bond pads.
11 . The method of claim 8 , further comprising:
performing a thinning process on a second surface of the second substrate;
forming a plurality of through substrate vias (TSVs) in the second substrate; and
forming a third bond structure on the second surface of the second substrate, wherein the third bond structure comprises one or more second conductive bonding levels.
12 . The method of claim 11 , wherein a first subset of the one or more second conductive bonding levels contacts and is electrically coupled to the plurality of TSVs, and wherein a second subset of the one or more second conductive bonding levels contacts the second surface of the second substrate.
13 . The method of claim 11 , further comprising:
forming a third IC chip comprising:
forming a plurality of second transistors on a third substrate;
forming a third interconnect structure on the third substrate;
forming a fourth bond structure on the third interconnect structure; and
performing a second bonding process to bond the third IC chip to the second IC chip such that the second and third IC chips are electrically coupled together, wherein a second bonding interface is between the third bond structure and the fourth bond structure.
14 . The method of claim 13 , wherein a number of conductive bonding levels in the one or more second conductive bonding levels is greater than a number of conductive bonding levels in the fourth bond structure.
15 . The method of claim 13 , wherein the fourth bond structure comprises a plurality of conductive bonding structures directly contacting a topmost layer of conductive wires in the third interconnect structure and a bottom conductive bonding level in the one or more second conductive bonding levels.
16 . The method of claim 8 , wherein the one or more first conductive bonding levels comprise a plurality of first bond pads directly contacting the single conductive bonding level, wherein the single conductive bonding level directly contacts a topmost layer of conductive wires in the second interconnect structure.
17 . A method for forming an image sensor, the method comprising:
forming a first integrated circuit (IC) chip, comprising:
forming a plurality of photodetectors in a first substrate;
forming a first interconnect structure on a first surface of the first substrate;
forming a first bond structure on the first interconnect structure;
forming a second IC chip, comprising:
forming a plurality of first transistors on a first surface of a second substrate;
forming a second interconnect structure on the first surface of the second substrate;
forming a second bond structure on the second interconnect structure;
bonding the first IC chip and the second IC chip together such that a first bonding interface is disposed between the first bond structure and the second bond structure;
forming a plurality of through-substrate vias (TSVs) into a second surface of the second substrate, wherein the plurality of TSVs are electrically coupled to the second interconnect structure;
forming a third bond structure on the second surface of the second substrate;
forming a third IC chip, comprising:
forming a plurality of second transistors on a third substrate;
forming a third interconnect structure on the third substrate;
forming a fourth bond structure on the third interconnect structure; and
bonding the second IC chip and the third IC chip together such that a second bonding interface is disposed between the third bond structure and the fourth bond structure;
wherein at least one of the first bond structure, the second bond structure, the third bond structure, and the fourth bond structure comprises a single conductive bonding level, wherein the single conductive bonding level comprises a plurality of first bond pads or a plurality of first bond contacts.
18 . The method of claim 17 , wherein the forming of the first IC chip further comprises forming a floating diffusion node in the first substrate and adjacent to one or more of the plurality of photodetectors, wherein the plurality of first transistors comprises a source-follower transistor electrically coupled to the floating diffusion node by way of the first and second bond structures.
19 . The method of claim 17 , wherein the first and second bond structures are spaced vertically between a first topmost level of conductive wires in the first interconnect structure and a second topmost level of conductive wires in the second interconnect structure.
20 . The method of claim 17 , wherein the third bond structure comprises a plurality of second bond pads directly contacting a plurality of second bond contacts of the fourth bond structure, wherein the plurality of second bond contacts directly contact a topmost level of conductive wires in the third interconnect structure.