Optoelectronic device having quantum well intermixing and method for processing the same

1 . A method for processing an optoelectronic device, the method comprising:

providing a carrier substrate;

depositing a first n-doped layer on the carrier substrate;

depositing an active region layer on the first n-doped layer;

depositing a p-doped layer on the active region layer;

depositing a first structured mask on the p-doped layer defining first areas within the active region layer below the first structured mask;

diffusing a p-type dopant thereby causing a quantum well intermixing in second areas adjacent to the first areas;

depositing a second structured mask on the p-doped layer covering the first areas within the active region layer and parts of the second areas adjacent to the first areas;

forming a mesa structure adjacent to the parts of the second areas, wherein the mesa structure extends to the first n-doped layer thereby exposing a pn-junction between the first n-doped layer and a p-type dopant-doped region along its sidewall; and

creating a thin n-type surface layer on sidewalls extending from the first n-doped layer substantially to the surface of the p-doped layer.

2 . The method according to claim 1 , wherein the first structured mask comprises an electrically conductive material.

3 . The method according to claim 1 , wherein depositing the active region layer comprises depositing a quantum well or multi-quantum well layer structure.

4 . The method according to claim 1 , wherein depositing the active region layer comprises depositing a non-doped or slightly n-doped layer onto the n-doped layer prior to depositing the active layer region structure.

5 . The method according to claim 1 , wherein depositing the p-doped layer comprises depositing a non-doped or slightly p-doped layer onto the active region layer prior to depositing the p-doped layer.

6 . The method according to claim 1 , wherein the dopant for the n-doped layer is selected from the group consisting of tellurium, silicon, and selenium, and wherein the dopant for the p-doped layer is selected from the group consisting of magnesium and zinc.

7 . The method according to claim 1 , wherein diffusing the p-type dopant comprises:

depositing the dopant at a first temperature on the p-doped layer; and

diffusing the dopant into the p-doped layer at a second temperature being at least partially higher than the first temperature.

8 . The method according to claim 1 , wherein depositing the second structured mask comprises:

depositing a mask layer being a SiO 2 layer on the p-doped layer and optionally onto the first structured mask; and

structuring the second mask on the p-doped layer such that regions above the second area surrounding the first area are removed.

9 . The method according to claim 1 , wherein forming the mesa structure comprises etching a material of the p-doped layer including the dopant, the active layer region and a portion of the first n-doped region to form one or more cavities building the mesa structure, and wherein optionally the sidewalls of the cavity are inclined with regards to a bottom of the n-doped layer in the mesa structure.

10 . The method according to claim 1 , wherein creating the thin n-type surface layer on the sidewalls comprises:

depositing n-type dopant being Te or Se onto the sidewall surface; and

diffusing the deposited dopant into the sidewall surface, wherein a concentration of the deposited dopant is selected such that, after diffusing deposited dopant into the sidewall surface, the sidewall comprises the n-type surface layer.

11 . The method according to claim 10 , wherein depositing comprises:

evaporating or sputtering the n-type dopant at a first temperature on the sidewall surface; or

depositing n-type dopant by Metalorganic vapor-phase epitaxy at the first temperature on the sidewall surface; and

diffusing the dopant into the sidewall surface at a second temperature being at least partially higher than the first temperature.

12 . The method according to claim 1 , wherein the p-type dopant is Zn.

13 . An optoelectronic device comprising:

a layer stack having a circumferential sidewall region and comprising:

an n-doped layer;

an active region layer deposited on the n-doped layer, the active region layer having a central first portion and a surrounding second portion;

a p-doped layer arranged on the active region layer,

wherein the surrounding second portion comprises a p-type dopant causing a quantum well intermixing in the surrounding second portion; and

a thin n-doped surface layer on the circumferential sidewall extending from the n-doped layer substantially towards a top of the p-doped layer thereby forming an artificial pn-junction substantially parallel to the circumferential sidewall region and at least partially within the surrounding second portion and the p-doped layer.

14 . The optoelectronic device according to claim 13 , wherein the thin n-doped surface layer comprises a thickness in a range of 10 nm to 250 nm.

15 . The optoelectronic device according to claim 13 , wherein the p-type dopant at least partially extends close to or into the n-doped layer forming the artificial pn-junction surrounding the central first portion.

16 . The optoelectronic device according to claim 13 , wherein the surrounding second portion comprises a lateral width of at last 500 nm.

17 . The optoelectronic device according to claim 13 , wherein the p-type dopant comprises Zn and the n-doped surface layer comprises Te.

18 . The optoelectronic device according to claim 13 , wherein the n-doped surface layer comprises the p-type dopant, and an n-type dopant of a higher concentration than the p-type dopant.