Method of manufacturing light-emitting element and light-emitting element
A method of manufacturing light-emitting elements includes: providing a wafer including a semiconductor stack, the semiconductor stack including: first semiconductor layer, an active layer on the first semiconductor layer, and a second semiconductor layer on the active layer, wherein the semiconductor stack includes element areas each including a part of the first semiconductor layer, a part of the active layer, and a part of the second semiconductor layer; forming a first reflection layer contiguously on or above (i) the second semiconductor layer in the element areas and (ii) the second semiconductor layer located between adjacent ones of the element areas; forming first masks covering parts of the first reflection layer that are on or above the second semiconductor layer in the element areas; and forming a groove that is located between the adjacent ones of the element areas and surrounds each of the plurality of element areas.
1 . A method of manufacturing light-emitting elements, the method comprising:
providing a wafer, which comprises:
providing a semiconductor stack, the semiconductor stack comprising:
a first semiconductor layer,
an active layer on the first semiconductor layer, and
a second semiconductor layer on the active layer,
wherein the semiconductor stack comprises a plurality of element areas each comprising a part of the first semiconductor layer, a part of the active layer, and a part of the second semiconductor layer,
forming a first electrode on each part of the first semiconductor layer, and
forming a second electrode on each part of the second semiconductor layer;
forming a first reflection layer contiguously on or above (i) the second semiconductor layer in the plurality of element areas and (ii) the second semiconductor layer located between adjacent ones of the plurality of element areas, wherein the first reflection layer is formed contiguously on or above each first electrode and on or above each second electrode;
forming a plurality of first masks covering first parts of the first reflection layer that are on or above the second semiconductor layer in the plurality of element areas; and
forming a groove that is located between the adjacent ones of the plurality of element areas and surrounds each of the plurality of element areas, wherein the step of forming the groove comprises removing a second part of the first reflection layer and a part of the semiconductor stack both located between adjacent ones of the plurality of first masks to expose the first semiconductor layer.
2 . The method according to claim 1 , wherein, in the step of forming the groove, the first reflection layer and the semiconductor stack are partially removed by reactive ion etching.
3 . The method according to claim 2 , wherein:
the step of forming the groove comprises:
removing the second part of the first reflection layer located between the adjacent ones of the plurality of first masks by etching using a fluorine-containing gas, and
removing the part of the semiconductor stack located between the adjacent ones of the plurality of first masks by etching using a chlorine-containing gas.
4 . The method according to claim 1 , further comprising:
after the step of forming the first reflection layer, forming a second reflection layer on or above the first reflection layer.
5 . The method according to claim 4 , wherein:
the step of forming the second reflection layer comprises, after forming the groove:
forming a second mask covering the groove,
forming the second reflection layer on or above the second mask and on or above the first reflection layer, and
removing the second mask and the second reflection layer on or above the second mask.
6 . The method according to claim 4 , wherein:
the step of forming the second reflection layer comprises, before forming the groove:
forming the second reflection layer contiguously on or above the first reflection layer,
forming a third mask covering first parts of the second reflection layer above the plurality of element areas, and
removing a second part of the second reflection layer from regions located between parts of the third mask.
7 . The method according to claim 1 , further comprising:
forming openings to expose each first electrode and each second electrode through the first reflection layer; and
forming a conductive member in each of the openings.
8 . The method according to claim 7 , further comprising:
before the step of forming the conductive members, forming an insulation layer covering the first reflection layer, lateral surfaces of the first reflection layer that define the openings, and a lateral surface of the semiconductor stack that defines the groove.
9 . The method according to claim 1 , wherein:
the first reflection layer comprises a dielectric multilayer film.
10 . The method according to claim 1 , wherein:
the step of providing the wafer comprises sequentially forming the first semiconductor layer, the active layer, and the second semiconductor layer on a first substrate; and
the method further comprises:
after forming the groove, attaching the semiconductor stack and a second substrate via a resin member; and
after the step of attaching the semiconductor stack and the second substrate, removing the first substrate to expose a surface of the first semiconductor layer.
11 . A method of manufacturing light-emitting elements, the method comprising:
providing a wafer, which comprises:
providing a semiconductor stack comprising:
a first semiconductor layer,
an active layer on the first semiconductor layer, and
a second semiconductor layer on the active layer,
wherein the semiconductor stack comprises a plurality of element areas each comprising a part of the first semiconductor layer, a part of the active layer, and a part of the second semiconductor layer,
forming a first electrode on each part of the first semiconductor layer, and
forming a second electrode on each part of the second semiconductor layer;
forming a first reflection layer contiguously on or above (i) the second semiconductor layer in the plurality of element areas (ii) the second semiconductor layer located between adjacent ones of the plurality of element areas, wherein the first reflection layer is formed contiguously on or above each first electrode and on or above each second electrode;
forming a plurality of first masks covering first parts of the first reflection layer that are on or above the second semiconductor layer in the plurality of element areas;
forming a groove between the adjacent ones of the plurality of element areas, which comprises removing a second part of the first reflection layer and a part of the semiconductor stack both located between adjacent ones of the plurality of first masks to expose the first semiconductor layer;
forming openings to expose each first electrode and each second electrode through the first reflection layer;
forming an insulation layer covering the first reflection layer, lateral surfaces of the first reflection layer that define the openings, and a lateral surface of the semiconductor stack that defines the groove; and
after the step of forming the insulation layer, forming a conductive member in each of the openings.