Display device including cover layer overlapping back gate electrode
A display device includes a display area, a non-display area, and an open area between the display area and the non-display area. The display device includes a substrate; a transistor on the substrate, a back gate electrode, wherein at least a portion of the back gate electrode overlaps the transistor and at least another portion of the back gate electrode overlaps the open area, a passivation layer on the transistor, and including an opening that overlaps the open area, and a cover layer overlapping the back gate electrode in the open area.
1 . A display device including a display area, a non-display area, and an open area between the display area and the non-display area, the display device comprising:
a substrate;
a transistor on the substrate;
a back gate electrode, wherein at least a portion of the back gate electrode overlaps the transistor and at least another portion of the back gate electrode overlaps the open area; a passivation layer on the transistor, and including an opening that overlaps the open area; and
a cover layer overlapping the back gate electrode in the opening,
wherein the transistor comprises a semiconductor layer comprising a first material, and the cover layer comprises the first material,
wherein the cover layer is between the passivation layer and the substrate,
wherein the open area is defined as an area where the passivation layer is not arranged,
wherein the back gate electrode is disposed between the substrate and the passivation layer, and
wherein a portion of the cover layer is disposed in the opening in a plan view, the portion of the cover layer does not contact the back gate electrode and the passivation layer.
2 . The display device according to claim 1 , wherein the semiconductor layer and the cover layer are made of the same material.
3 . The display device according to claim 1 , wherein the first material comprises polysilicon, amorphous silicon, and/or oxide semiconductor.
4 . The display device according to claim 1 , further comprising an interlayer insulating layer on the semiconductor layer, and including an opening that overlaps with the open area.
5 . The display device according to claim 1 , wherein at least a portion of the back gate electrode is arranged between the substrate and the transistor, and another portion of the back gate electrode is arranged between the substrate and the cover layer.
6 . The display device according to claim 5 , wherein the cover layer comprises polysilicon, amorphous silicon, and/or oxide semiconductor to be an etch stopper layer for the back gate electrode arranged in the open area, when an etching process for the passivation layer is performed.
7 . The display device according to claim 1 , further comprising an insulating layer in the open area, and arranged on the same layer as the passivation layer.
8 . The display device according to claim 1 ,
wherein the back gate electrode comprises a first back gate electrode and a second back gate electrode that are arranged in the open area and are physically spaced apart from each other, and
wherein the cover layer integrally covers the first back gate electrode and the second back gate electrode.
9 . The display device according to claim 1 ,
wherein the back gate electrode comprises a first back gate electrode and a second back gate electrode that are arranged in the open area and are physically spaced apart from each other, and
wherein the cover layer comprises a first cover layer and a second cover layer that are arranged in the open area and are physically spaced apart from each other, the first cover layer overlapping the first back gate electrode, and the second cover layer overlapping the second back gate electrode in a plan view.
10 . The display device according to claim 1 , wherein the back gate electrode in the open area is arranged in an area where the cover layer is located, in a plan view.
11 . The display device according to claim 1 , wherein light is provided to an outside in the display area, and light is not provided to the outside in the non-display area.
12 . The display device according to claim 1 , wherein the open area is in a shape enclosing at least a portion of the display area.
13 . The display device according to claim 1 , further comprising:
a buffer layer on the back gate electrode;
wherein the semiconductor layer is on the buffer layer, and
wherein the semiconductor layer and the cover layer are on the same layer.
14 . The display device according to claim 13 , wherein the semiconductor layer and the cover layer are covered by one insulating layer.