Display device and method for manufacturing the same

1 . A display device, comprising:

a transistor that is disposed on a substrate;

a first electrode that is disposed on the substrate;

a pixel defining layer that is disposed on the first electrode;

a separator pattern that is disposed on the pixel defining layer;

auxiliary wiring that is disposed between the pixel defining layer and the separator pattern;

a second electrode that is disposed on the first electrode, the pixel defining layer, and the separator pattern;

connection wiring that connects between the transistor and the second electrode; and

an intermediate layer that is disposed between the first electrode and the second electrode,

wherein a portion of the second electrode disposed on the separator pattern and a portion of the second electrode disposed around the separator pattern are separated from each other.

2 . The display device of claim 1 , comprising:

a display area that displays an image; and

a peripheral area that surrounds the display area,

wherein the auxiliary wiring is disposed in the display area and the peripheral area.

3 . The display device of claim 2 , further comprising:

a first power voltage line disposed in the peripheral area and transmitting a high potential power voltage,

wherein the auxiliary wiring is connected to the first power voltage line.

4 . The display device of claim 3 , wherein

the pixel defining layer is disposed on the first power voltage line,

the pixel defining layer includes an opening overlapping the first power voltage line, and

the auxiliary wiring is connected to the first power voltage line in the opening.

5 . The display device of claim 4 , wherein

the separator pattern is disposed on the auxiliary wiring in the peripheral area, and

a width of the auxiliary wiring is the same as a width of a lower portion of the separator pattern.

6 . The display device of claim 4 , wherein

the separator pattern is disposed on the auxiliary wiring and the pixel defining layer in the peripheral area, and

a width of the auxiliary wiring is narrower than a width of a lower portion of the separator pattern.

7 . The display device of claim 4 , wherein

the separator pattern is disposed in the display area and is not disposed in the peripheral area, and

the intermediate layer is disposed directly on the auxiliary wiring in the peripheral area.

8 . The display device of claim 4 , wherein the first power voltage line is disposed on a same layer as the first electrode.

9 . The display device of claim 2 , wherein the auxiliary wiring disposed in the display area and the auxiliary wiring disposed in the peripheral area are integrally formed by being connected to each other.

10 . The display device of claim 9 , wherein

the auxiliary wiring disposed in the display area has a net shape in a plan view, and

the auxiliary wiring disposed in the peripheral area has a shape surrounding the display area in the plan view.

11 . The display device of claim 1 , wherein a constant voltage is applied to the auxiliary wiring.

12 . The display device of claim 1 , wherein the auxiliary wiring includes an oxide semiconductor.

13 . The display device of claim 1 , wherein

the pixel defining layer includes a positive type photosensitive resin, and

the separator pattern includes a negative type photosensitive resin.

14 . A method for manufacturing a display device, comprising:

forming a transistor above a substrate;

forming connection wiring connected to the transistor;

forming an insulating layer on the connection wiring;

forming a first electrode on the insulating layer;

forming a pixel defining layer on the first electrode;

patterning the pixel defining layer to form a first opening overlapping the first electrode and a second opening overlapping the connection wiring;

forming auxiliary wiring and a separator pattern that overlap each other on the pixel defining layer;

forming an intermediate layer on the first electrode, the pixel defining layer, and the separator pattern; and

forming a second electrode connected to the connection wiring on the intermediate layer.

15 . The method of claim 14 , wherein the forming of the pixel defining layer and the separator pattern comprises:

sequentially stacking a first material layer and a second material layer on the pixel defining layer;

forming the separator pattern by patterning the second material layer; and

forming the auxiliary wiring by patterning the first material layer using the separator pattern as a mask.

16 . The method of claim 15 , wherein

the first material layer includes an oxide semiconductor, and

the second material layer includes a negative type photosensitive resin.

17 . The method of claim 16 , wherein the pixel defining layer includes a positive type photosensitive resin.

18 . The method of claim 17 , wherein

a width of the first opening and a width of the second opening are gradually widened as the first opening and the second opening move away from the substrate, and

a width of the separator pattern is gradually widened as the separator pattern moves away from the substrate.

19 . The method of claim 15 , wherein a width of the auxiliary wiring is the same as a width of a lower portion of the separator pattern.

20 . The method of claim 14 , wherein the forming of the pixel defining layer and the separator pattern comprises:

forming a first material layer on the pixel defining layer;

patterning the first material layer to form the auxiliary wiring;

forming a second material layer on the auxiliary wiring; and

patterning the second material layer to form the separator pattern.

21 . The method of claim 20 , wherein a width of the auxiliary wiring is narrower than a width of a lower portion of the separator pattern.

22 . The method of claim 14 , wherein the display device comprises:

a display area that displays an image; and

a peripheral area that surrounds the display area,

wherein the auxiliary wiring is disposed in the display area and the peripheral area.

23 . The method of claim 22 , wherein

the forming of the first electrode further comprises forming a first power voltage line that transmits a high potential power voltage in the peripheral area, and

the auxiliary wiring is connected to the first power voltage line.

24 . The method of claim 23 , wherein

the forming of the first opening and the second opening in the pixel defining layer further comprises forming a third opening overlapping the first power voltage line in the pixel defining layer, and

the auxiliary wiring is connected to the first power voltage line in the third opening.