IP Library Granted Patent US 12685067
Granted Patent B2
US 12685067 · App. 18/324,262 · Granted Jul 14, 2026

Wafer processing method and wafer processing system

Inventors: Yuki Inoue (Tokyo, JP); Naoko Yamamoto (Tokyo, JP)
Assignee: DISCO CORPORATION
H10P72/0428B24B7/228H10P72/0414
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Quick Facts
Patent No.
US 12685067
App. No.
18/324,262
Granted
Jul 14, 2026
Kind
B2
Abstract

A wafer processing method includes an outer edge removing step of removing an outer edge of a first wafer having a first wiring layer formed on a front surface thereof from the front surface, and a polishing step of polishing the first wiring layer on the front surface of the first wafer after the outer edge removing step.

Claims (12)

1 . A wafer processing method comprising:

an outer edge removing step of removing an outer edge of a first wafer having a first wiring layer formed on a front surface thereof from the front surface;

a polishing step of polishing the front surface of the first wafer after the outer edge removing step; and

wherein the polishing step is started in a state where a processing liquid supplied in the outer edge removing step remains on the front surface of the first wafer.

2 . The wafer processing method according to claim 1 , further comprising:

a bonding step of bonding the first wafer and a second wafer having a second wiring layer formed on a front surface thereof to each other,

wherein the first wiring layer and the second wiring layer are joined to each other in the bonding step.

3 . The wafer processing method according to claim 2 , further comprising:

a back surface grinding step of grinding a back surface of the first wafer to a finish thickness after the bonding step,

wherein a thickness removed from the front surface is deeper than the finish thickness of the first wafer in the outer edge removing step.

4 . The wafer processing method according to claim 1 ,

wherein the polishing step is wet polishing using a polishing liquid.